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PNX7100 Datasheet Preview

PNX7100 Datasheet

MPEG AVG CODEC

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INTEGRATED CIRCUITS
DATA SHEET
PNX7100
MPEG AVG CODEC
Objective specification
File under Integrated Circuits, IC02
2002 Feb 28




Philips

PNX7100 Datasheet Preview

PNX7100 Datasheet

MPEG AVG CODEC

No Preview Available !

Philips Semiconductors
MPEG AVG CODEC
Objective specification
PNX7100
FEATURES
Interfaces
32-bit 133 MHz SDRAM interface supports up to two
256 Mbit devices including one SyncFlash memory
PCI-XIO extension bus interface supports PCI-bus
(rev. 2.2) and 8-bit NAND or NOR flash
8 or 16-bit IDE interface ATA-4 (master)
I2S-bus interface to basic engine (slave)
Byte parallel MPEG TS output to IEEE 1394 link
interface
Byte parallel MPEG TS or DV input from IEEE 1394 link
interface
Four DMA UARTs
Two I2C-bus master or slave transceivers
32 GPIO pins
RGB (YUV), YC and CVBS output (10-bit DAC) with
Macrovision copy protection
SMPTE 293M progressive digital video output interface
ITU-R BT.656 digital video output interface
ITU-R BT.656 digital video input interface
Four serial two-channel audio outputs for multichannel
and headphone (I2S-bus format)
Serial IEC 60958 or IEC 61937 audio output (SPDIF
format)
Serial two-channel audio input (I2S-bus format)
Two serial IEC 60958 or IEC 61937 audio inputs (SPDIF
format).
Control
High performance 133 MHz PR3940 RISC (32-bit
MIPS-II and MIPS16 CPU) with 16 kbyte instruction
cache, 8 kbyte data cache and 4 word write buffer
Low-power mode including wake-up on interrupt
Boot from NAND, NOR or SyncFlash memory or I2C-bus
Two 24-bit timers
24-bit watchdog timers.
Hardware MPEG TS demultiplexer supports
simultaneous record and playback
Software MPEG PS demultiplexer
Software controlled data stream manager assisted by
scatter-gather DMA
Software controlled MPEG TS, PS or PES multiplexer.
Video decoder
MPEG-2 Main Profile at Main Level (MP@ML) decoder
DV video decoder
Software controlled trick play, assisted by hardware
PES and ES pre-parser.
Graphics
Region based linked list graphics
2, 4 or 8 bits per pixel with (24 + 6T)-bit CLUT
16 bits per pixel YUV
16 or 32 bits per pixel RGB
Anti-flickering with 2 or 3 tap filter
64 levels alpha blending
S-VCD RTG support
DVD sub picture unit
Two YUV 4 : 2 : 0 or 4 : 2 : 2 planes with flexible
2D scaling and positioning
YUV 4 : 2 : 2 progressive display unit
4 bits per pixel hardware cursor with (14 + 2T)-bit CLUT.
System
Single 4 MHz clock input, all necessary clocks
generated on-chip
Hardware based sector processor: DVD and VCD
support
CSS decryption module
CPRM encryption and decryption module
2002 Feb 28
2


Part Number PNX7100
Description MPEG AVG CODEC
Maker Philips
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