P89C51RB2 Datasheet (PDF) Download
Philips Semiconductors
P89C51RB2

Description

The P89C51RA2/RB2/RC2/RD2xx contains a non-volatile 8KB/16KB/32KB/64KB Flash program memory that is both parallel programmable and serial In-System and In-Application Programmable.

Key Features

  • 80C51 Central Processing Unit
  • On-chip Flash Program Memory with In-System Programming (ISP) and In-Application Programming (IAP) capability
  • Boot ROM contains low level Flash programming routines for downloading via the UART
  • Can be programmed by the end-user application (IAP)
  • Supports 6-clock/12-clock mode via parallel programmer (default clock mode after ChipErase is 12-clock)
  • 6-clock/12-clock mode Flash bit erasable and programmable via ISP
  • 6-clock/12-clock mode programmable “on-the-fly” by SFR bit
  • Peripherals (PCA, timers, UART) may use either 6-clock or 12-clock mode while the CPU is in 6-clock mode
  • Speed up to 20 MHz with 6-clock cycles per machine cycle (40 MHz equivalent performance); up to 33 MHz with 12 clocks per machine cycle
  • Fully static operation