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PLL103-07 Datasheet

2 Dimm Ddr Fanout Buffer

Manufacturer: PhaseLink Corporation

PLL103-07 Overview

“True” clocks of differential pair outputs. “plementary” clocks of differential pair outputs. The bytes must be accessed in sequential order from lowest to highest byte.

PLL103-07 Key Features

  • Generates 12-output buffers from one input
  • Supports VIA Pro266 DDR chipset
  • Supports up to 2 DDR DIMMS
  • Supports up to 400MHz DDR, SDRAMS
  • One additional output for feedback
  • 6 differential clock distribution
  • Less than 5ns delay
  • Skew between any outputs is less than 100 ps
  • 2.5V Supply range
  • Available in 28-pin SSOP

More Datasheets from PhaseLink Corporation

Part Number Description
PLL103-01 Low Skew Buffer
PLL103-02 DDR SDRAM Buffer
PLL103-03 DDR SDRAM Buffer
PLL103-04 1-to-4 Clock Distribution Buffer
PLL103-05 1-to-5 Clock Distribution Buffer
PLL103-06 DDR SDRAM Buffer
PLL103-11 Low Skew Buffers
PLL103-53 DDR SDRAM Buffer
PLL102-03 Low Skew Output Buffer
PLL102-04 Low Skew Output Buffer

PLL103-07 Distributor