PL613-05
FEATURES
DESCRIPTION
- Designed for PCB space savings with 3 low-power The PL613-05 is an advanced triple PLL design
Programmable PLLs and 3 distinct clock outputs. based on Phase Link’s Pico PLL, world’s smallest
- Low-power consumption (<10µA when PDB is activated) programmable clock, technology. This flexible programmable architecture is ideal for high
- Output frequency: performance, low-power, low-cost applications. When o <110MHz @ 1.8V operation using the power down (PDB) feature the PL613-05 o <166MHz @ 2.5V operation consumes less than 10 µA of power. Besides its small o <200MHz @ 3.3V operation form factor and 3 distinct outputs that can reduce
- Input frequency: o Fundamental Crystal: 10MHz to 40MHz o Reference Input: 10MHz to 200MHz overall system costs, the PL613-05 offers superior phase noise, jitter and power consumption performance.
- Programmable I/O pins can be configured as
Output Enable (OE), Power Down (PDB) inputs, or
Clock output.
- Disabled...
