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PhaseLink Corporation

PL611-20 Datasheet Preview

PL611-20 Datasheet

Programmable Quick Turn Clock

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PL611-20
Programmable Quick Turn ClockTM
FEATURES
PIN CONFIGURATION
Advanced programmable PLL design
Very low Jitter and Phase Noise (< 40ps Pk-Pk typical)
Up to 3 outputs
Output frequency up to 200MHz CMOS.
Crystal inputs:
o Fundamental crystal: 10MHz-30MHz
o 3RD overtone crystal: Up to 75MHz
www.DataSheet4UA.ccocmepts <1.0V reference signal input voltage
One programmable I/O pin can be configured as
Output Enable (OE), or Frequency Selection input
(FSEL), or Reference clock.
Single 2.5V or 3.3V ± 10% power supply
Operating temperature range from -40°C to 85°C
Available in 8-pin MSOP/SOIC, 6-pin SOT Green/
RoHS compliant packages, or Die
DESCRIPTION
XIN/FIN
GND
CLK0
CLK1
18
27
36
45
SOP-8
MSOP-8
XOUT
CLK2,OE,FSEL
NC
VDD
CLK1
GND
XIN/FIN
1
2
3
6 VDD
5 CLK2,OE,FSEL
4 XOUT
SOT-23
The PL611-20 is a low-cost general purpose frequency synthesizer and a member of PhaseLink’s Factory
Programmable ‘Quick Turn Clock (QTC)’ family. PhaseLink’s PL611-20 product family can generate any output
frequency up to 200 MHz from fundamental crystal input between 10 MHz - 30 MHz, or a 3rd overtone crystal of
up to 75Mhz.
BLOCK DIAGRAM
XIN/FIN
XOUT
FSEL
OE
CLoad
Xtal FRef R-counter
OSC
(8-bit)
M-counter
(10-bit)
Phase
Detector
Charge
Pump
Loop
Filter
FVCO = F Ref. * (2 * M /R)
VCO
P-counter
(5-bit)
FOut = FVCO / (2 * P)
Programmable Function
/1, /2
CLK [0:1]
CLK2, OE, FSEL
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 07/06/05 Page 1




PhaseLink Corporation

PL611-20 Datasheet Preview

PL611-20 Datasheet

Programmable Quick Turn Clock

No Preview Available !

KEY PROGRAMMING PARAMETERS
PL611-20
Programmable Quick Turn ClockTM
CLK[ 0:2 ]
Output Frequency
Output Drive
Strength
Crystal Load
Programmable
Input/Output (pin #7)
Fout = FIN * M / (R * P) where
M=10 bit
R = 8 bit
P = 5 bit
1. CLK[0:1] = VCO / 2 * P
2. CLK0 = ~ CLK1
www.DataShe2et.4CU.LcKom[2]= FIN or FIN/2
Std: 10mA
(default)
High: 24mA
+/- 200ppm
tuning.
One output pin can be
configured as
1. CLK2 = FIN or FIN/2
2. FSEL - input
3. OE - input
Charge-Pump
Current
4 levels of pump
current setting
PIN DESCRIPTION
Name
XIN/FIN
GND
CLK[0:1]
VDD
DNC
Pin #
(M)SOP-8 SOT-23
13
22
3,4 1
56
6-
Type
Description
I Crystal or Reference input pin
P GND connection
O Programmable Clock Output [note:CLK0=CLK1]
P VDD connection (2.25~3.63V)
- Do No Connect
This programmable I/O pin can be configured as CLK2
(FIN or FIN/2) output, or OE input, or Frequency
Selection (FSEL) input pin. This pin has an internal 60K
pull up resistor.
CLK2, OE, FSEL
7
5B
State
0
OE
Tristate
CLK[0:1]
FSEL
Select Freq. ‘1’
1 (default)
Normal
mode
Select Freq. ‘2’
XOUT
8 4 O Crystal output pin
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 07/06/05 Page 2


Part Number PL611-20
Description Programmable Quick Turn Clock
Maker PhaseLink Corporation
PDF Download

PL611-20 Datasheet PDF






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