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PhaseLink Corporation

PL611-07 Datasheet Preview

PL611-07 Datasheet

Programmable Quick Turn Clock

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PL611-07
Programmable Quick Turn ClockTM
FEATURES
Advanced programmable PLL design
Very low Jitter and Phase Noise (30-70ps Pk-Pk typical)
Up to 2 programmable outputs
Output frequency up to 75MHz CMOS
Programmable Output Enable (OE) pin
Accepts Crystal clock input
o Fundamental crystal: 10MHz-30MHz
www.DataSheet4Uo.comReference input: Up to 100MHz
Single 2.5V or 3.3V ± 10% power supply
Operating temperature range from -40°C to 85°C
Available in 6-pin SOT Green/RoHS compliant Pkg.
PIN CONFIGURATION
CLK1
GND
XIN/FIN
1
2
3
6 VDD
5 CLK2, OE
4 XOUT
SOT- 23
DESCRIPTION
The PL611-07 is a low-cost general purpose
frequency synthesizer and a member of PhaseLink’s
Programmable ‘Quick Turn Clock (QTC)’ family.
PhaseLink’s PL611-07 offers generating two system
clock frequencies of up to 75MHz form a 10-30MHz
fundamental crystal or a Reference clock source.
One clock output can be programmed to operate as
OE or be used as a Reference output. Cascading of
the ICs to produce additional clock frequencies is
also supported.
BLOCK DIAGRAM
PIN DESCRIPTION
Name
CLK1
Pin
#
Type
Description
1 O Programmable Clock Output
GND
XIN/FIN
XOUT
2
3
4
P GND connection
I
Crystal or Reference input
pin
O Crystal output pin
CLK2,
OE
VDD
5
6
B
Programmable Clock or
Reference Output, or OE
P
VDD connection
(2.25~3.63V)
XIN/FIN
XOUT
Xtal FRef R-counter
OSC
(8-bit)
M-counter
(10-bit)
Phase
Detector
Charge
Pump
Loop
Filter
FVCO = F Ref. * (2 * M /R)
VCO
P-counter
(5-bit)
Fout = FVCO / (2 * P)
Programmable Function
Selectable
/1,/2,/4,/8
Selectable
/1,/2
CLK[1:2]
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/17/05 Page 1




PhaseLink Corporation

PL611-07 Datasheet Preview

PL611-07 Datasheet

Programmable Quick Turn Clock

No Preview Available !

ELECTRICAL SPECIFICATIONS
PL611-07
Programmable Quick Turn ClockTM
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage Range
VDD -0.5 4.6
V
Input Voltage Range
VI
-0.5 VDD+0.5
V
Output Voltage Range
VO
-0.5 VDD+0.5
V
www.DataSheeSt4oUl.dceorming Temperature (Green package)
Data Retention @ 85°C
260 °C
10 Year
Storage Temperature
TS -65 150 °C
Ambient Operating Temperature
-40 85 °C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above
the operational limits noted in this specification is not implied.
AC SPECIFICATIONS
PARAMETERS
Crystal Input Frequency(XIN)
CONDITIONS
Fundamental Crystal
MIN. TYP. MAX. UNITS
10 30 MHz
Input (FIN) Frequency
100 MHz
Input (FIN) Signal Amplitude
Internally AC coupled
0.9 VDD Vpp
Settling Time
At power-up (after VDD increases over 1.62V)
10 ms
Output Rise Time
15pF Load, 10/90%VDD, Standard drive
15pF Load, 10/90%VDD, High drive
2.5 3.5
1.0 1.5
ns
ns
Output Fall Time
15pF Load, 90/10%VDD, Standard drive
15pF Load, 90/10%VDD, High drive
2.5 3.5
1.0 1.5
ns
ns
Duty Cycle
At VDD/2
45 50 55
%
Period Jitter, peak-to-peak*
With capacitive decoupling between VDD and
(measured from 10,000 samples) GND. Operating only one output.
* Note: Jitter performance depends on the programming parameters.
70 ps
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/17/05 Page 2


Part Number PL611-07
Description Programmable Quick Turn Clock
Maker PhaseLink Corporation
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PL611-07 Datasheet PDF






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