PL610-01 Datasheet | PhaseLink Corporation

FEATURES - Wide frequency coverage, programmable, advanced oscillator design. - Programmable “Odd/Even” Divider up to ÷63 - Direct oscillation operation with optional programmable features : o Output Drive Strength (4, 8, or 16m A) o 6-bit Odd/Even Output Divider .. - Input Frequency: o Fundamental Crystal: 5MHz to 130MHz o Reference Clock: 1MHz to 130MHz - Supports CMOS or Sine Wave input clock - Output Frequency: 20k Hz to 130MHz - Very low Jitter and Phase Noise - Low current consumption - Single 1.8V, 2.5V, or 3.3V ± 10% power supply - Operating temperature range from -40  C to 85  C DESCRIPTION The PL610 is a high performance general purpose oscillator IC for outputs up to 130MHz. Designed to fit in a small 2 x 1.3mm DFN or 3 x 3mm SOT23 package, the PL610 offers the best phase noise and jitter performance and lowest power consumption of any parable IC. In addition, there is a ‘6’ bit optional programmable Odd/Even divider (default= ٪ 1), and ‘3’ programmable output drive strengths (4m A, 8m A (default), 16m A) to choose from. The full feature set of the PL610 makes it the most versatile XO for any application. PACKAGE PIN CONFIGURATION OE^, PDB^, CLK1 XIN, FIN OE^, PDB^, CLK1 GND 1 2 3 6 5 4 CLK0 VDD XOUT 1 2 3 6 5 4 XOUT VDD CLK0 GND XIN, FIN DFN-6L (2.0mmx1.3mmx0.6mm) SOT23-6L (3.0mmx3.0mmx1.35mm) BLOCK DIAGRAM 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 .phaselink. Rev 4/2/07 Page 1 (Preliminary) 1.8V to 3.3V, 1MHz to 130MHz XO IC KEY PROGRAMMING PARAMETERS (Optional) CLK[0:1] Output Frequency F OUT = F REF / P- (- : P is an Odd/Even Divider) Where P = 6 bit CLK0 = F REF , F REF /2 or F REF / P .. CLK1 = F REF , F REF /2 or CLK0 Output Drive Strength Three optional drive strengths to choose from: - Low: 4m A - Std: 8m A (default) - High: 16m A Programmable Input/Output One output pin can be configured as: - OE - input - PDB -...