PLL602-11 Datasheet PDF (Low Phase Noise PECL XO)

PLL602-11 - Low Phase Noise PECL XO

Description

The PLL602-11 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC with PECL output, for 96MHz to 192MHz output range.

It provides a low phase noise reference frequency using a low cost crystal.

The chip delivers an output frequency of F XIN x 8.

Features

PIN.

Datasheet Details

Part number	PLL602-11
Manufacturer	PhaseLink
File Size	142.08 KB
Description	Low Phase Noise PECL XO
Datasheet	PLL602-11 Datasheet
Additional preview pages of the PLL602-11 datasheet.

📁 Similar Datasheet

PLL0210A - PHASE LOCKED LOOP (Z-Communications)

PLL0930A - PHASE LOCKED LOOP (Z-Communications)

PLL1000A - PHASE LOCKED LOOP (Z-Communications)

PLL102-03 - Low Skew Output Buffer (PhaseLink Corporation)

PLL102-04 - Low Skew Output Buffer (PhaseLink Corporation)

PLL102-05 - Low Skew Output Buffer (PhaseLink Corporation)

PLL102-10 - Low Skew Output Buffer (PhaseLink Corporation)

PLL102-108 - Programmable DDR Zero Delay Clock Driver (PhaseLink Corporation)

PLL102-109 - Programmable DDR Zero Delay Clock Driver (PhaseLink Corporation)

PLL102-15 - Low Skew Output Buffer (PhaseLink Corporation)

Full PDF Text Transcription

Click to expand full text

m Preliminary PLL602-11 o c . Low Phase Noise PECL XO (12 – 24MHz Crystals) 96MHz – 192MHz U 4 t e FEATURES PIN CONFIGURATION e h S output for the 96MHz to • Low phase noise a 192MHz range t (-134 dBc at 10kHz offset). a • PECL output. D24MHz crystal input. • 12 . to • w Integrated crystal load capacitor: no external wload capacitor required. w• Output Enable selector. VDD 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD VDD XIN GND_BUF CLKBAR • • 3.3V operation. Available in 16 Pin TSSOP or SOIC. DESCRIPTION The PLL602-11 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC with PECL output, for 96MHz to 192MHz output range. It provides a low phase noise reference frequency using a low cost crystal. The chip delivers an output frequency of F XIN x 8.

Published: Feb 10, 2006 |