PI74ALVC162835F Datasheet | Pericom Semiconductor

Features - PI74ALVC162835F is designed for low voltage operation, VCC = 2.3V to 3.6V - Outputs have equivalent 26Ω series resistors - Supports PC133 Registered DIMM .. - Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C - Typical VOHV (Output Voh Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C - Industrial operation at - 40°C to +85°C - Packages available: - 56-pin 240 mil wide plastic TSSOP (A) - 56-pin 173 mil wide plastic TVSOP (K6) - 56-pin 300 mil wide plastic SSOP (V) Product Description Peri Semiconductor’s PI74ALVC series of logic circuits are produced using the pany’s advanced 0.5 micron CMOS technology, achieving industry leading speed. The 18-bit PI74ALVC162835F universal bus driver is designed for 2.3V to 3.6V VCC operation. Data flow from A to Y is controlled by Output Enable (OE). The device operates in the transparent mode when LE is HIGH. The A data is latched if CLK is held at a high or low logic level. If LE is LOW, the A-bus is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is HIGH, the outputs are in the highimpedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Logic Block Diagram A1 1D C1 CLK 3 Y1 TO 17 OTHER CHANNELS PS8377A 07/01/99 PI74ALVC162835F 18-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin Name OE LE CLK A Y GND VCC Description Output Enable Input (Active LOW) Latch Enable Clock Input Data Input Data Output Ground Power Truth Table(1)† Inputs OE H L L L L LE X H H L L L L CLK...