PI6CU877 driver equivalent, pll clock driver.
* PLL clock distribution optimized for DDR2 SDRAM applications.
* Distributes one differential clock input pair to ten differential clock output pairs.
* Diff.
* Distributes one differential clock input pair to ten differential clock output pairs.
* Differential www.Data.
PI6CU877 PLL clock driver is developed for Registered DDR2 DIMM applications with 1.8V operation and differential data input and output levels. The device is a zero delay buffer that distributes a differential clock input pair (CLK, CLK) to eleven di.
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