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Pericom Semiconductor Corporation

PI2EQX3201 Datasheet Preview

PI2EQX3201 Datasheet

3.2Gbps 2 Differential Channel Serial Re-driver

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PI2EQX3201
3.2Gbps 2 Differential Channel Serial Re-driver
with built-in Equalization and De-emphasis
Features
• Two 3.2Gbps differential signal
• Adjustable Transmiter De-Emphasis & Amplitude
• Adjustable Receiver Equalization
• One Spread Spectrum Reference Clock Buffer Output
• 100Ω Differential CML I/O’s
• Low Power (100mW per Channel)
• Stand-by Mode – Power Down State
• VCC Operating Range: 1.8V ±0.1V
• Built in Clock Buffer
• Packaging (Pb-free & Green):
— 36-pad TQFN (ZF36)
Description
Pericom Semiconductor’s PI2EQX3201 is a low power, signal
re-driver. The device provides programmable equalization,
amplification, and de-emphasis by using 4 select bits, SEL[0:3],
to optimize performance over a variety of physical mediums by
reducing Inter-symbol interference. PI2EQX3201 supports two
100 Differential CML data I/O’s between the Protocol ASIC to
a switch fabric, across a backplane, or extends the signals across
other distant data pathways on the user’s platform.
The integrated equalization circuitry provides flexibility with
signal integrity of the signal before the re-driver. Whereas the
integrated de-emphasis circuitry provides flexibility with signal
integrity of the signal after the re-driver.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX3201 also provides power management Stand-by mode
operated by a Bus Enable pin.
Block Diagram
Pin Description
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36 35 34 33 32 31 30 29
VDD 1
28 VDD
AI+ 2
27 A0+
AI-
GND
3
4
26 A0-
25 GND
AVDD
VDD
B0+
5
6
7
GND
24 AGND
23 VDD
22 BI+
B0- 8
21 BI-
GND 9
20 GND
VDD 10
19 IREF
11 12 13 14 15 16 17 18
06-0086
1
PS8818
02/28/06




Pericom Semiconductor Corporation

PI2EQX3201 Datasheet Preview

PI2EQX3201 Datasheet

3.2Gbps 2 Differential Channel Serial Re-driver

No Preview Available !

www.DataSheet4U.com
PI2EQX3201
3.2Gbps 2 Differential Channel Serial Re-driver
with built-in Equalization and De-emphasis
Pin Description
Pin #
Pin Name
1, 6, 10, 23, 28
2
VDD
AI+
3 AI-
4, 9, 20, 25
GND
22 BI+
21 BI-
33, 34
SEL[0:1]_A
13, 14
SEL[0:1]_B
32 SEL[2]_A
15 SEL[2]_B
31 SEL[3]_A
16 SEL[3]_B
27 AO+
26 AO-
7 BO+
8 BO-
30, 29
12
11
17, 18
5
24
19
35, 36
EN_[A,B]
CLKIN-
CLKIN+
OUT+, OUT-
AVDD
AGND
IREF
NC
I/O
PWR
I
I
PWR
I
I
I
I
I
I
I
I
O
O
O
O
I
I
I
O
PWR
PWR
O
N/A
Description
1.8V Supply Voltage
Positive CML Input Channel A with internal 50Ω pull down
Negative CML Input Channel A with internal 50Ω pull down
Supply Ground
Positive CML Input Channel B with internal 50Ω pull down
Negative CML Input Channel B with internal 50Ω pull down
Selection pins for equalizer (see Amplifier Configuration Table)
w/ 50KΩ internal pull up
Selection pins for amplifier (see Amplifier Configuration Table)
w/ 50KΩ internal pull up
Selection pins for De-Emphasis (See De-Emphasis Configuration Table)
w/ 50KΩ internal pull up
Positive CML Output Channel A internal 50Ω pull up during normal operation and
2KΩ pull up otherwise.
Negative CML Output Channel A with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
Positive CML Output Channel B with internal 50Ω pull up during normal operation
and 2KΩ pull up otherwise.
Negative CMLOutput Channel B with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
EN_[A:B] is the enable pin. A LVCMOS high provides normal operation. A LVC-
MOS low selects a low power down mode.
Differential Input Reference Clock
Differential Reference Clock Output
1.8V Analog supply voltage
Analog ground
External 475Ω resistor connection to set the differential output current
No connect pins. For normal operation, leave pins floating
06-0086
2
PS8818
02/28/06


Part Number PI2EQX3201
Description 3.2Gbps 2 Differential Channel Serial Re-driver
Maker Pericom Semiconductor Corporation
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PI2EQX3201 Datasheet PDF






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