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Pericom Semiconductor Corporation

PI29FCT2520T Datasheet Preview

PI29FCT2520T Datasheet

FAST CMOS MULTILEVEL PIPELINE REGISTERS

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PI29FCT520T/2520T
PI29FCT521T1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233
Fast CMOS Multilevel Pipeline Registers
Product Features:
• PI29FCT520T and PI29FCT521T are pinout and
function compatible with IDT29FCT520/521,
QS29FCT520/521 and AMD's Am29520/521
• Four 8-bit high-speed registers
• Hold, Transfer, and load instructions
• Dual two-level or single four-level pipeline operation
• TTL input and output levels, reducing problematic
"ground bounce"
• High output drive
IOL = 48 mA
• Extremely low static power (1 mW, typ.)
• Industrial operating temperature range: –40°C to +85°C
• FCT (2xxxT) has a 25series resistor.
• Packages available:
– 24-pin 300 mil wide plastic DIP (P24)
– 24-pin 150 mil wide plastic QSOP (Q24)
– 24-pin 150 mil wide plastic TQSOP (R24)
– 24-pin 300 mil wide plastic SOIC (S24)
Logic Block Diagram
Product Description:
Pericom Semiconductor’s PI29FCT series of logic circuits are
pro-duced in the Company’s advanced 0.8 micron CMOS
technology, achieving industry leading speed grades.
The PI29FCT520T/2520T and PI29FCT521T are multilevel
pipeline registers containing four 8-bit positive triggered registers
which can be configured as a dual 2-level or a single 4-level
pipeline. These products are designed for use as temporary storage
or for storage delays in pipelined systems.
The PI29FCT521T differs from the PI29FCT520T/2520T only in
the way data is loaded into and between registers in the dual 2-level
operation. When data is entered into the first level (I = 2 or I = 1)
of the PI29FCT520T/2520T, the existing data in the first level is
moved to the second level. In the PI29FCT521T, these instructions
simply overwrite the data in the first level. Transfer of data to the
second level is achieved using the 4-level shift instruction (I = 0)
causing the first level to change. In either part, I = 3 shift
instruction puts the registers on hold.
Device models available upon request.
D0–D7
8
www.DataSheet4U.com
I0,I1
2
CLK
1
REGISTER
CONTROL
S0,S1
2
FCT520.pm6
1
MUX
OCTAL
REGISTER A1
OCTAL
REGISTER B1
OCTAL
REGISTER A2
OCTAL
REGISTER B2
MUX
OE
1
8
Y0–Y7
12/18/96, 4:44 PM
PS2002B 12/10/96




Pericom Semiconductor Corporation

PI29FCT2520T Datasheet Preview

PI29FCT2520T Datasheet

FAST CMOS MULTILEVEL PIPELINE REGISTERS

No Preview Available !

PI29FCT520/521T/2520T
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788M990011U2233L44T5566I77L8899E0011V2233E44L556677P88I99P0011E2211L22I3344N55E667788R9900E11G2233I44S5566T7788E99R0011S2233
Product Pin Configuration
I0
I1
D0
D1
D2
D3
D4
D5
D6
D7
CLK
GND
1 24
2 23
3 22
4 21
5 24-PIN 20
6 P24 19
7 Q24 18
8 R24 17
9 S24 16
10 15
11 14
12 13
VCC
S0
S1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
OE
Register Selection
S1 S0
00
01
10
11
Register
B2
B1
A2
A1
Product Pin Description
Pin Name
OE
CLK
I0,I1
S0,S1
Dx
Yx
GND
VCC
Description
Output Enable Input (Active LOW) for
3-State Output Port
Clock Input. Enter data into registers on
LOW-to-HIGH transistions
Instruction Inputs
Multiplexer Select. Inputs either register
A1, A2, B1, or B2 data to be avaialbe at the
output ports
Register Inputs
Register Outputs
Ground
Power
PI29FCT520/T2520T Data Loading
DUAL 2-LEVEL
SINGLE 4-LEVEL
A1 B1
A1 B1
www.DataSheet4U.com
A2
B2
A2 B2
I=2
NOTE: I = 3 FOR HOLD
PI29FCT521T Data Loading
DUAL 2-LEVEL
I=1
A1 B1
A2 B2
I=0
SINGLE 4-LEVEL
A1 B1
A1 B1
A1 B1
A2 B2
I=2
NOTE: I = 3 FOR HOLD
A2 B2
I=1
FCT520.pm6
2
A2 B2
I=0
2
12/18/96, 4:44 PM
PS2002B 12/10/96


Part Number PI29FCT2520T
Description FAST CMOS MULTILEVEL PIPELINE REGISTERS
Maker Pericom Semiconductor Corporation
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PI29FCT2520T Datasheet PDF






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Pericom Semiconductor Corporation





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