PI6CL10804 Datasheet | Pericom Semiconductor

1.2V/1.5V, 200MHz, 1:4 Networking Clock Buffer Features - High-speed, low-noise, non-inverting 1:4 buffer - Maximum Frequency up to 200 MHz - Low output skew < 100ps - Low propagation delay < 3.5ns - Optimized duty cycle - 3.3V tolerent input - 1.2V or 1.5V supply voltage - Packages (Pb-free & Green available): -8-pin SOIC (W) Description The PI6CL10804 is a 1.2V or 1.5V high-speed, low-noise 1:4 non-inverting clock buffer. The key goal in designing the PI6CL10804 is to target networking applications that require low-skew, low-jitter, and high-frequency clock distribution. Providing output-to-output skew as low as 100ps, the PI6CL10804 is an ideal clock distribution device for synchronous systems. Designing synchronous networking systems requires a tight level of skew from a large number of outputs. Block Diagram BUF_IN CLK0 CLK1 CLK2 CLK3 Pin Configuration BUF_IN 1 CLK0 2 CLK1 3 CLK2 4 8 OE 7 VDD 6 GND 5 CLK3 13-0130 Pin Description Pin Name Description BUF_IN Input CLK [0:3] Outputs Ground Power...