PI4ULS3V16M Datasheet | Pericom Semiconductor

Features - Designed for low voltage operation: 1.2V to 3.3V ±10% - Universal bidirectional level shifting with automatic direction control - Fast bus speeds up to 160 Mbps - IOFF supports partial Power-Down mode operation - Drive Capability 12m A - Independent translation of each bit - Each supply rail is configurable over supply range - ESD Protection exceeds JESD22 - 2000V Human Body Model (A114-B) - 200V Machine Model (A115-A) - Latch-up performance exceeds 100m A per JESD 78 - Industrial operation at - 40°C to +85°C - Packaging (Pb-free & Green): - 45 lead VFBGA (NL) Description Peri Semiconductor’s PI4ULS3V16M is a 16-bit (dual-octal) non-inverting bus transceiver with two separate supply rails. A port (VCCA) and B port (VCCB) are set to operate at 1.4V to 3.6V. This arrangement permits universal bidirectional translation of differential signal levels over the voltage ranges. PI4ULS3V16M is designed for asynchronous munication between data buses. Data is transmitted from the A bus to the B bus, or vice versa, without direction control. All AX, and BX are tri-stated when data is ing from both directions at the same time. The output-enable (OE) input is used to disable outputs so buses are isolated. The control pins, SEL, TEST_EN and Out_SEL are supplied by VCCB. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power-up or powerdown, the output-enable (OE) input should be tied to VCC through a pullup resistor. Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -...