• Part: PI4MSD5V9547
  • Description: 8-Channel I2C bus multiplexer
  • Manufacturer: Pericom Semiconductor
  • Size: 673.29 KB
Download PI4MSD5V9547 Datasheet PDF
Pericom Semiconductor
PI4MSD5V9547
PI4MSD5V9547 is 8-Channel I2C bus multiplexer manufactured by Pericom Semiconductor.
Features - 1-of-8 bidirectional translating multiplexer - I2C-bus interface logic - Operating power supply voltage from 1.65V to 5.5V - Allows voltage level translation between 1.2V, 1.8V,2.5 V, 3.3 V and 5 V buses - Low standby current - Low Ron switches - Active LOW reset input - Channel selection via I2C bus - Power-up with one channel on - Capacitance isolation when channel disabled - No glitch on power-up - Supports hot insertion - 5 V tolerant inputs - 0 Hz to 400 k Hz clock frequency - ESD protection exceeds 8000 V HBM per JESD22- A114, and 1000 V CDM per JESD22-C101 - Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 m A - Packages offered: TSSOP-24L,TQFN-24ZD Description The PI4MSD5V9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only one SCx/SDx channel can be selected at a time, determined by the contents of the programmable control register. The device powers up with Channel 0 connected, allowing immediate munication between the master and downstream devices on that channel. An active LOW reset input allows the PI4MSD5V9547 to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-On Reset (POR) function. The pass gates of the switches are constructed such that the VCC pin can be used to limit the maximum high voltage which is passed by the PI4MSD5V9547. This allows the use of different bus voltages on each pair, so that1.2V, 1.8 V or 2.5 V or 3.3 V parts can municate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant. Pin Configuration TSSOP TQFN 2016-06-0003 PT0544-3 09/02/16 ||||||||||||||||||||||||||||||||||||||||||||||||||||...