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Pericom Semiconductor

PI3HDMI1310-A Datasheet Preview

PI3HDMI1310-A Datasheet

HDMI Switch

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PI3HDMI1310-A
HDMI™ Switch with non-blocking EQ Circuitry
Features
• Differential channel 3:1 Mux/DeMux for TDMS signals
• 3:1 Mux/DeMux for DDC signals
• non-EQ blocking circuitry to utilize ideal EQ found in
main receiver chipset
• Low power consumption to support Energy Star
Compliance
• Data rate support up to 3.4Gbps (16bit color depth per
channel)
• 2 pin control for port selection
• 3.3V power and 5V standby power
• ESD protection on all I/O pins
→ ±8kV contact per IEC61000-4-2
→ 7kV HBM per JESD22
• Packaging (Pb-free & Green): 72 - Contact TQFN
Description
Pericom Semiconductor’s PI3HDMI™ series of switch circuits
are targeted for high-resolution video networks that are based on
DVI/HDMI standards. The PI3HDMI1310-A is a 3-to-1 HDMI
Mux/DeMux Switch. It is designed for low bit-to-bit skew and
high channel-to-channel noise isolation. The maximum DVI/
HDMI data rate of 3.4Gbps provides the resolution required
by next generation HDTV and PC graphics. Three differential
channels are used for data (video signals for DVI or audio/video
signals for HDMI), and one differential channel is used for Clock
for decoding the TMDS signals at the outputs.
PI3HDMI1310-A was designed specifically to meet ATC-Sink
requirement for the HPD ports. The high speed video ports and
DDC ports can be either source or sink.
All TMDS I/O pins are protected with Pericom's ESD protection
circuits, supporting protection against ESD damage as high as
±8kV contact per IEC6000-4-2 spec.
Block Diagram
D0-D3A±
D0-D3B±
D0-D3C±
4 - differential
TMDS Lanes
4 - differential
TMDS Lanes
4 - differential
TMDS Lanes
DDC_CLK A
DDC_DATA A
DDC_CLK B
DDC_DATA B
DDC_CLK C
DDC_DATA C
HPD_A
HPD_B
HPD_C
4 - differential
TMDS Lanes
D0-D3±
DDC_CLK
DDC_DATA
HPD_Sink
100kΩ
12-0196
Control Logic
SEL1 SEL2 OE
Pin Configuration (Top View)
GND
D2-A
D2+A
D3-A
D3+A
VDD
D0-B
D0+B
D1-B
D1+B
D2-B
D2+B
VDD
D3-B
D3+B
GND
D0-C
D0+C
D1-C
D1+C
VDD
D2-C
D2+C
D3-C
D3+C
GND
1 72 71 70 69 68 67 66 65 64 63 62
2 61
3 60
4 59
5 58
6 57
7 56
8 55
9 54
10 53
11 52
12 51
13 50
14 49
15 48
16 47
17 46
18 45
19 44
20 43
21 42
22 41
23 40
24 39
25 38
26 27 28 29 30 31 32 33 34 35 36 37
GND
VDD
HPD_Sink
SEL2
SEL1
OE
VDD
D0-
D0+
GND
D1-
D1+
VDD
D2-
D2+
GND
D3-
D3+
VDD
DDC_Data
DDC_CLK
GND
GND
GND
GND
GND
1 www.pericom.com 01/25/13http://www.Datasheet4U.com




Pericom Semiconductor

PI3HDMI1310-A Datasheet Preview

PI3HDMI1310-A Datasheet

HDMI Switch

No Preview Available !

PI3HDMI1310-A
HDMI™ Switch with non-blocking EQ Circuitry
Pin Description
Pin #
69, 68, 71, 70,
3, 2, 5, 4,
8, 7, 10, 9, 12,
11, 15, 14
18, 17, 20, 19,
23, 22, 25, 24
Pin Name
Dx±A (X = 0, 1, 2, 3)
Dx±B (X = 0, 1, 2, 3)
Dx±C (X = 0, 1, 2, 3)
Pin Type
I/O
I/O
I/O
65, 66, 67
HPDA, HPDB, HPDC
Output
33, 64
60
29, 28, 32, 31,
35, 34, 42, 43
55, 54, 53, 52,
51, 49, 48, 46,
45
58, 59
6, 13, 21, 44,
50, 56, 61
1, 16, 26, 27,
30, 36, 37, 38,
39, 40, 41, 53,
62, 63, 72
VDD50
HPD_Sink
DDC_CLKx, DDC_Datax
DX± (x = 0, 1, 2, 3)
SEL1, SEL2
VDD
GND
57 OE
Power
Input
I/O
I/O
Inputs
Power
Power
Input
Description
Port A High Speed inputs
Port B High Speed inputs
Port C High Speed inputs
HPD open-drain outputs for each port. Logic will follow
truth table on page 7.
External 1Kohm pull-up to 5V is required
5.0V voltage rail from HDMI/DVI connector. Used during
standby-mode.
GP I/O pin from SCALAR. Internal 100Kohm pull-down.
I2C signals for DDC communication on TMDS ports
4-differential high speed Output signals
Selection for D0-D3 and DDC signals (Select Pins, see truth
tables on page 5)
3.3V Power Supply
Ground.
Output enable (Active LOW). When HIGH, all outputs are
Hi-Z and chip is placed into Standby Mode. Under Standby
Mode, the current supply is from VDD50.
12-0196
2
www.pericom.com
01/25/13


Part Number PI3HDMI1310-A
Description HDMI Switch
Maker Pericom Semiconductor
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