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Pericom Semiconductor

PI3HDMI101 Datasheet Preview

PI3HDMI101 Datasheet

1:1 Active HDMI ReDriver

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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101
1:1 Active HDMI™ ReDriver™ with
Optimized Equalization & I2C Buffer
Features
• Supply voltage, VDD = 3.3V ±5%
• Support for both DVI and HDMITM signals
• Supports both AC-coupled and DC-coupled inputs
• Supports Deep ColorTM
• High Performance, up to 2.5 Gbps per channel
• 5V Tolerance on I2C path
• Integrated 50-Ohm (±10%) termination resistors at each high
speed signal input
• Rx Sense Support, CLK-off channel is switched to 250K-Ohm
pull-up vs. 50-Ohm pull-up
• Congurable output swing control
(400mV, 500mV, 600mV, 750mV, 1000mV)
• Congurable Pre-Emphasis levels
(0dB, 1.5dB, 3.5dB, & 6.0dB, 9.0dB)
• Congurable De-Emphasis
(0dB, -3.5dB, -6.0dB, -9.5dB)
• Optimized Equalization
Single default setting will support all cable lengths
• 8kV Contact ESD protection on all input/output data channels
per IEC 61000-4-2
• Hot insertion support on output high speed pins & SCL/SDA
pins only
• Propagation delay 1ns
• High Impedance Outputs when disabled
• Packaging (Pb-free & Green): 42-contact TQFN (ZH42)
Description
Pericom Semiconductor’s PI3HDMI101 1:1 active ReDriver™
circuit is targeted for high-resolution video networks that are
based on DVI/HDMITM standards and TMDS signal processing.
The PI3HDMI101 is an active ReDriver with Hi-Z outputs.
The device receives differential signals from selected video
components and drives the video display unit. This solution also
provides a unique advanced pre-emphasis technique to increase
rise and fall times which are reduced during transmission across
long distances.
Each complete HDMI/DVI channel also has slower speed, side
band signals, that are required to be switched. Pericom’s solution
provides a complete solution by integrating the side band buffer
together with the high speed buffer in a single solution. Using
Equalization at the input of each of the high speed channels,
Pericom can successfully eliminate deterministic jitter caused by
long cables from the source to the sink. The elimination of the
deterministic jitter allows the user to use much longer cables (up
to 25 meters).
The maximum DVI/HDMI Bandwidth of 2.5 Gbps provides 36-
bit Deep Color™ support, which is offered by HDMI revision
1.3. The PI3HDMI101 also provides enhanced robust ESD/EOS
protection of 8kV, which is required by many consumer video
networks today.
The Optimized Equalization provides the user a single optimal
setting that can provide HDMI compliance for all cable lengths:
1meter to 20meters and color depths of 8bit/ch, or 12bit/ch.
Pericom also offers the ability to ne tune the equalization settings
in situations where cable length is known. For example, if 25meter
cable length is required, Pericom's solution can be adjusted to
16dB EQ to accept 25meter cable length.
09-0055
All trademarks are property of their respective owners.
1
PS8924C
10/05/09




Pericom Semiconductor

PI3HDMI101 Datasheet Preview

PI3HDMI101 Datasheet

1:1 Active HDMI ReDriver

No Preview Available !

ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101
1:1 Active HDMITM Redriver with
Optimized Equalization & I2C Buffer
Pin Conguration
EQ_S0
EQ_S1
GND
IN_CLK–
IN_CLK+
VDD
IN_D0–
IN_D0+
GND
IN_D1–
IN_D1+
VDD
IN_D2–
IN_D2+
GND
Rx_Sense
DCC_EN
1 42414039 38
2 37
3 36
4 35
5 34
6 33
7 32
8 31
9 GND 30
10 29
11 28
12 27
13 26
14 25
15 24
16 23
17 22
18192021
SCL_T
VDD
GND
OUT_CLK–
OUT_CLK+
VDD
OUT_D0–
OUT_D0+
GND
OUT_D1–
OUT_D1+
VDD
OUT_D2–
OUT_D2+
GND
VDD
OC_S3
TMDS Receiver Block
Each high speed data and clock input has the same integrated equalization that can eliminate deterministic
jitter caused by input traces or cables. All activity can be congured using pin strapping. The Rx block is
designed to receive all relevant signals directly from the HDMI™ connector without any additional circuitry,
3 High speed TMDS data, 1 pixel clock, and DDC signals. Pixel clock channel has following termination
scheme for Rx Sense support.
250K ohm
AV DD
R2
Control
Rx Sense
L
H
R2 switch is open, CLK+/-
termination is 250k
R2 switch is closed, CLK+/-
termination is 50
CLK+/-
Rx Sense
Although the TMDS clock input channel (pin
4 and 5) has different termination scheme
when port is off, user can still connect TMDS
data channels to these pins for better layout if
R1 required. Any of the 4 differential inputs and
outputs can have data or clock signals passing
through.
All trademark0s9a-r0e0p5ro5perty of their respective owners.
2
PS8924C
10/05/09


Part Number PI3HDMI101
Description 1:1 Active HDMI ReDriver
Maker Pericom Semiconductor
PDF Download

PI3HDMI101 Datasheet PDF






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