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Pericom Semiconductor

PI2EQX4402 Datasheet Preview

PI2EQX4402 Datasheet

2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer

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PI2EQX4402
2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer
Features
• Two High Speed PCI Express lanes
• Supports PCI Express data rates (2.5 Gbps) on each lane
• Adjustable Transmiter De-Emphasis & Amplitude
• Adjustable Receiver Equalization
• Two Spread Spectrum Reference Clock Buffer Outputs
• 100Ω Differential CML I/O’s
• Low Power (100mW per Channel)
• Standby Mode – Power Down State
• VDD Operating Range: 1.8V +/-0.1V
• Packaging (Pb-free & Green):
- 84-ball LFBGA
www.DataSheet4U.com
Description
Pericom Semiconductor’s PI2EQX4402 is a low power, PCI
Express compliant signal re-driver. The device provides
programmable equalization, amplification, and de-emphasis
by using 7 select bits, SEL[0:6], to optimize performance
over a variety of physical mediums by reducing Inter-symbol
interference. PI2EQX4402 supports four 100 Differential CML
data I/O’s between the Protocol ASIC to a switch fabric, across
a backplane, or extends the signals across other distant data
pathways on the user’s platform.
The integrated equalization circuitry provides flexibility with
signal integrity of the PCI Express signal before the re-driver.
Whereas the integrated de-emphasis circuitry provides flexibility
with signal integrity of the PCI Express signal after the re-driver.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX4402 also provides power management Stand-by mode
operated by a Bus Enable pin.
Block Diagram
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Pin Description (Top View)
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1
PS8778E
02/15/06




Pericom Semiconductor

PI2EQX4402 Datasheet Preview

PI2EQX4402 Datasheet

2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer

No Preview Available !

PI2EQX4402
2.5Gbps x2 Lane Serial PCI Express Repeater / Equalizer
Pin Description
Pin #
B1, F1, D2, E2,
B3, F3, H4, B8,
F8, B10, F10
C3
D3
E1, J1, F2, E3, J3,
H7, E8, J8, D9,
E9, F9, E10, J10
C8
D8
G3
H3
G8
H8
A3, B4, B5
A4, C4, C5
G2, J2, J4
H2, K2, J5
B6, A5
C6, A6
K3, K4
J6, J9
B7, A7
C7, A8
K9, G9
K10, H9
Pin Name
VDD
AI+
AI-
GND
BI+
BI-
CI+
CI-
DI+
DI-
SEL[0:2]_A
SEL[0:2]_B
SEL[0:2]_C
SEL[0:2]_D
SEL[3:4]_A
SEL[3:4]_B
SEL[3:4]_C
SEL[3:4]_D
SEL[5:6]_A
SEL[5:6]_B
SEL[5:6]_C
SEL[5:6]_D
C10 AO+
D10 AO-
C1 BO+
D1 BO-
G10 CO+
H10 CO-
G1 DO+
H1
A9, A10, B9, C9
DO-
EN_
[A,B,C,D]
I/O
PWR
I
I
PWR
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
O
O
O
O
O
O
O
I
Description
1.8V Supply Voltage
Positive CML Input Channel A with internal 50Ω pull down
Negative CML Input Channel A with internal 50Ω pull down
Supply Ground
Positive CML Input Channel B with internal 50Ω pull down
Negative CML Input Channel B with internal 50Ω pull down
Positive CML Input Channel C with internal 50Ω pull down
Negative CML Input Channel C with internal 50Ω pull down
Positive CML Input Channel D with internal 50Ω pull down
Negative CML Input Channel D with internal 50Ω pull down
Selection pins for equalizer (see Amplifier Configuration Table)
w/ 50KΩ internal pull up
Selection pins for amplifier (see Amplifier Configuration Table)
w/ 50KΩ internal pull up
Selection pins for De-Emphasis (See De-Emphasis Configuration Table)
w/ 50KΩ internal pull up
Positive CML Output Channel A internal 50Ω pull up during normal operation and
2KΩ pull up otherwise.
Negative CML Output Channel A with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
Positive CML Output Channel B with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
Negative CMLOutput Channel B with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
Positive CMLOutput Channel C with internal 50Ω pull up during normal operation
and 2KΩ pull up otherwise.
Negative CMLOutput Channel C with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
Positive CMLOutput Channel D with internal 50Ω pull up during normal operation
and 2KΩ pull up otherwise.
Negative CMLOutput Channel D with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
EN_[A:D] is the enable pin with internal 50KΩ pull up resistor. A LVCMOS high
provides normal operation. A LVCMOS low selects a low power down mode.
2
PS8778E
02/15/06


Part Number PI2EQX4402
Description 2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer
Maker Pericom Semiconductor
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PI2EQX4402 Datasheet PDF






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