PI2EQX4402 Datasheet | Pericom Semiconductor

Features - - - - - - - - - - Two High Speed PCI Express lanes Supports PCI Express data rates (2.5 Gbps) on each lane Adjustable Transmiter De-Emphasis & Amplitude Adjustable Receiver Equalization Two Spread Spectrum Reference Clock Buffer Outputs 100Ω Differential CML I/O’s Low Power (100m W per Channel) Standby Mode - Power Down State VDD Operating Range: 1.8V +/-0.1V Packaging (Pb-free & Green): - 84-ball LFBGA Description Peri Semiconductor’s PI2EQX4402 is a low power, PCI Express pliant signal re-driver. The device provides programmable equalization, amplification, and de-emphasis by using 7 select bits, SEL[0:6], to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. PI2EQX4402 supports four 100 Differential CML data I/O’s between the Protocol ASIC to a switch fabric, across a backplane, or extends the signals across other distant data pathways on the user’s platform. The integrated equalization circuitry provides flexibility with signal integrity of the PCI Express signal before the re-driver. Whereas the integrated de-emphasis circuitry provides flexibility with signal integrity of the PCI Express signal after the re-driver. In addition to providing signal re-conditioning, Peri’s PI2EQX4402 also provides power management Stand-by mode operated by a Bus Enable pin. .. Block Diagram Pin Description (Top View) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -...