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Peregrine Semiconductor

PI2EQX5804 Datasheet Preview

PI2EQX5804 Datasheet

5.0Gbps 4-lane PCIe Gen2 Redriver

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PI2EQX5804
5.0Gbps 4-Lane PCI Express Gen2 Re-Driver
with Equalization & Emphasis
Features
• Up to 5.0Gbps PCI Express Gen-2 Serial Re-driver
• Supporting 8 differential channels or 4 lanes of PCIe Interface
• Pin strapped and I2C conguration controls (3.3V Tolerant)
• Adjustable receiver equalization
• Adjustable transmitter amplitude and de-emphasis
• Variable input an output termination
• 1:2 channel broadcast
• Channel loop-back
• Electrical Idle fully supported
• Receiver detect and individual output control
• Single supply voltage, 1.2V ± 0.05V
• Power down modes
• Packaging: 100-contact LFBGA, Pb-free & Green
Description
Pericom Semiconductor’s PI2EQX5804 is a low power,
PCI-express compliant signal re-driver. The device provides
programmable equalization, amplication, and de-emphasis by
using 8 select bits, to optimize performance over a variety of
physical mediums by reducing Inter-symbol interference.
PI2EQX5804 supports eight 100-Ohm Differential CML data
I/O’s between the Protocol ASIC to a switch fabric, across
a backplane, or extends the signals across other distant data
pathways on the user’s platform.
The integrated equalization circuitry provides exibility with
signal integrity of the PCI-express signal before the re-driver,
whereas the integrated de-emphasis circuitry provides exibility
with signal integrity of the signal after the re-driver.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX5804 also provides power management Stand-by mode
operated by a Power Down pin.
Block Diagram
xyRx+
xyRx-
xyTx+
xyTx-
+
+
Equalizer
Input level detect
to control logic
Output
Controls
+
xyTx+
xyTx-
+
Output
Controls
A
B
Input level detect
to control logic
Equalizer
+
+
Data Lane Repeats 4 Times
xyRx+
xyRx-
SELy_x
Sy_x
Dy_x
DE_x
PD#
SDA
SCL
Control registers
& logic
Power
Management
I2C Control
Mode
LB#
RXD_x
RES_x
Ax
Pin Conguration (Top-Side View)
12
34
56 7 8
9 10
A VDD B0TX- B0TX+ VDD SCL SDA VDD B0RX+ B0RX- VDD
B A1RX+ GND GND A0RX - DE_A VDD A0TX- GND GND A1TX+
C A1RX- GND GND A0RX+ NC PD# A0TX+ GND GND A1TX-
D VDD B1TX+ B1TX- VDD D2_A NC VDD B1RX- B1RX+ VDD
E SEL0_A SEL1_A SEL2_A D0_A D1_A S0_A RXD_A S1_A SIG_A RX50_A
F RX50_B SIG_B S1_B RXD_B S0_B A1 SEL2_B LB# SEL1_B SEL0_B
G VDD A2RX- A2RX+ VDD MODE D0_B VDD A2TX+ A2TX - VDD
H B2TX+ GND GND B3TX- DE_B A0 B3RX- GND GND B2RX+
J B2TX- GND GND B3TX+ RESET# D1_B B3RX+ GND GND B2RX-
K VDD A3RX+ A3RX- VDD D2_B A4
VDD A3TX- A3TX+ VDD
08-0218
1
PS8926B
09/04/08




Peregrine Semiconductor

PI2EQX5804 Datasheet Preview

PI2EQX5804 Datasheet

5.0Gbps 4-lane PCIe Gen2 Redriver

No Preview Available !

www.DataSheet4U.com
Pin #
Data Signals
C4
B4
C7
B7
B1
C1
B10
C10
G3
G2
G8
G9
K2
K3
K9
K8
A8
A9
A3
A2
D9
D8
D2
D3
H10
J10
H1
J1
J7
H7
J4
H4
Control Signals
H6, F6, K6
E4, E5, D5
Pin Name
A0RX+,
A0RX-
A0TX+,
A0TX-
A1RX+,
A1RX-
A1TX+,
A1TX-
A2RX+,
A2RX-
A2TX+,
A2TX-
A3RX+,
A3RX-
A3TX+,
A3TX-
B0RX+,
B0RX-
B0TX+,
B0TX-
B1RX+,
B1RX-
B1TX+,
B1TX-
B2RX+,
B2RX-
B2TX+,
B2TX-
B3RX+,
B3RX-
B3TX+,
B3TX-
A0, A1, A4
D[0:2]_A
Type
I
I
O
O
I
I
O
O
I
I
O
O
I
I
O
O
I
I
O
O
I
I
O
O
I
I
O
O
I
I
O
O
I
I
G6, J6, K5
D[0:2]_B I
B5
DE_A
I
PI2EQX5804
5.0Gbps 4-Lane PCI Express Gen2 Re-Driver with
Equalization & Emphasis
Description
CML inputs for Channel A0, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel A0, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
CML inputs for Channel A1, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel A1, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
CML inputs for Channel A2, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel A2, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
CML inputs for Channel A3 with internal 50-Ohm pull down during
normal operation, and >200K-Ohm otherwise.
CML outputs for Channel A3, with internal 50-Ohm pull up during
normal operation and and 2K-Ohm pull up otherwise.
CML inputs for Channel B0, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel B0, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
CML inputs for Channel B1, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel B1, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
CML inputs for Channel B2, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel B2, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
CML inputs for Channel B3, with internal 50-Ohm pull down dur-
ing normal operation, and >200K-Ohm otherwise.
CML outputs for Channel B3, with internal 50-Ohm pull up during
normal operation and 2K-Ohm pull up otherwise.
I2C programmable address bit A0, A1 and A4.
Selection pins for Channel Ax emphasis (See emphasis Congura-
tion Table) w/ 100K-Ohm internal pull up
Selection pins for Channel Bx emphasis (See emphasis Congura-
tion Table) w/ 100K-Ohm internal pull up
De-emphasis enable input for Channel A0, A1, A2 and A3 with
internal 100K-Ohm pull-up resistor. Set high selects output de-em-
phasis and set low selects output pre-emphasis.
08-0218
2
PS8926B
09/04/08


Part Number PI2EQX5804
Description 5.0Gbps 4-lane PCIe Gen2 Redriver
Maker Peregrine Semiconductor
PDF Download

PI2EQX5804 Datasheet PDF






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