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Peregrine Semiconductor

PE64102 Datasheet Preview

PE64102 Datasheet

Digitally Tunable Capacitor

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General Description
The PE64102 is a DuNE™-enhanced Digitally Tunable
Capacitor (DTC) based on Peregrine’s UltraCMOS®
technology. DTC products provide a monolithically
integrated impedance tuning solution for demanding
RF applications. They also offer a linear capacitance
change versus tuning state and excellent harmonic
performance compared to varactor-based tunable
solutions.
This highly versatile product can be mounted in series
or shunt configurations and uses a 3-wire (SPI
compatible) serial interface. It has a high ESD rating of
2 kV HBM on all ports making this the ultimate in
integration and ruggedness. The DTC will be offered in
a standard 12-lead 2.0 x 2.0 x 0.55 mm QFN
commercial package.
Peregrine’s DuNE™ technology enhancements deliver
high linearity and exceptional harmonics performance.
It is an innovative feature of the UltraCMOS® process,
providing performance superior to GaAs with the
economy and integration of conventional CMOS.
Figure 1. Functional Block Diagram
RF+
ESD
RF-
ESD
Serial
Interface
CMOS Control
Driver and ESD
71-0066-01
Product Specification
PE64102
UltraCMOS® Digitally Tunable Capacitor
(DTC) 100 3000 MHz
Features
3-wire (SPI compatible) 8-bit serial interface
with built-in bias voltage generation and
stand-by mode for reduces power
consumption
DuNETM-enhanced UltraCMOS® device
5-bit 32-state Digitally Tunable Capacitor
C = 1.88 pF 14.0 pF (7.4:1 tuning ratio) in
discrete 391 fF steps
RF power handing (up to 26 dBm, 6 VPK RF)
and high linearity
High quality factor
Wide power supply range (2.3V to 3.6V) and
low current consumption
(typ. IDD = 30 µA @ 2.8V)
Optimized for shunt configuration, but can
also be used in series configuration
Excellent 2 kV HBM ESD tolerance on
all pins
Applications include:
Antenna tuning
Tunable filters
Phase shifters
Impedance matching
Figure 2. Package Type
12-lead 2 x 2 x 0.55 mm QFN
Document No. DOC-89767-1 www.psemi.com
©2018 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 13




Peregrine Semiconductor

PE64102 Datasheet Preview

PE64102 Datasheet

Digitally Tunable Capacitor

No Preview Available !

PE64102
Product Specification
Table 1. Electrical Specifications @ 25°C, VDD = 2.8V
Parameter
Configuration
Condition
Min Typ Max
Operating Frequency Range 7
Minimum Capacitance
Maximum Capacitance
Tuning Ratio
Step Size
Quality Factor (Cmin) 1
Quality Factor (Cmax) 1
Self Resonant Frequency
Harmonics (2fo and 3fo) 4
Both
Shunt 6
Shunt 6
Shunt 6
Shunt 6
Shunt 6
Shunt 6
Shunt 7
Shunt 6
Series 5
State = 00000, 100 MHz (RF+ to Grounded RF-)
State = 11111, 100 MHz (RF+ to Grounded RF-)
Cmax/Cmin, 100 MHz
5 bits (32 states), constant step size (100 MHz)
470 582 MHz with Ls removed
698 960 MHz, with Ls removed
1710 2170 MHz, with Ls removed
470 582 MHz with Ls removed
698 960 MHz, with Ls removed
1710 2170 MHz, with Ls removed
State 00000
State 11111
470 – 582 MHz, Pin +26 dBm, 50Ω
698 – 915 MHz, Pin +26 dBm, 50Ω
1710 – 1910 MHz, Pin +26 dBm, 50Ω
470 – 582 MHz, Pin +20 dBm, 50Ω
698 – 915 MHz, Pin +20 dBm, 50Ω
1710 – 1910 MHz, Pin +20 dBm, 50Ω
100
-10%
-20%
1.88
14.0
7.4:1
0.391
50
50
28
25
20
5
4.7
1.6
3000
+10%
+20%
-36
-36
-36
-36
-36
-36
3rd Order Intercept Point
Shunt 6
IIP3 = (Pblocker + 2*Ptx - [IMD3]) / 2, where IMD3 = -95 dBm,
Ptx = +20 dBm and Pblocker = -15 dBm
60
Switching Time 2, 3
Shunt 6
State change to 10/90% delta capacitance between only two
states
2 10
Start-up Time 2
Shunt 6
Time from VDD within specification to all performances within
specification
5 20
Wake-up Time 2,3
Shunt 6
State change from standby mode to RF state to all
performances within specification
5 20
Note:
1. Q for a Shunt DTC based on a Series RLC equivalent circuit
Q = XC / R = (X-XL) / R, where X = XL + XC , XL = 2*pi*f*L, XC = -1 / (2*pi*f*C), which is equal to removing the effect of parasitic inductance LS
2. DC path to ground at RF+ and RFmust be provided to achieve specified performance
3. State change activated on falling edge of SEN following data word
4. Between 50Ω ports in series or shunt configuration using a pulsed RF input with 4620 vs period, 50% duty cycle, measured per 3GPPTS45.005
5. In series configuration the greater RF power or higher RF voltage should be applied to RF+
6. RF- should be connected to ground
7. DTC operation above SRF is possible
Unit
MHz
pF
pF
pF
GHz
dBm
dBm
dBm
dBm
dBm
dBm
dBm
µs
µs
µs
©2018 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 13
Document No. DOC-89767-1 UltraCMOS® RFIC Solutions


Part Number PE64102
Description Digitally Tunable Capacitor
Maker Peregrine Semiconductor
Total Page 13 Pages
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