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Peregrine Semiconductor

PE4309 Datasheet Preview

PE4309 Datasheet

RF Digital Attenuator

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Product Description
This product is a high linearity, 6-bit RF Digital Step Attenuator
(DSA) covering a 31.5 dB attenuation range in 0.5 dB steps.
The Peregrine 50RF DSA provides a parallel CMOS control
interface and it operates on 3-volt to 5-volt supply. It maintains
high attenuation accuracy over frequency and temperature and
exhibits very low insertion loss and low power consumption.
This Peregrine DSA is available in a 4x4 mm 24 lead QFN
footprint with an exposed ground paddle.
The PE4309 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Advance Information
PE4309
50 RF Digital Attenuator
6-bit, 31.5 dB, DC-4.0 GHz
Features
Best in class 2.0 kV HBM ESD tolerance
Low Insertion Loss: 1.6 dB typical
Attenuation: 0.5 dB steps to 31.5 dB
High Linearity: Typical 52 dB IP3
Best in Class Attenuation accuracy
Parallel programming interface
Single supply, 3V to 5V operation
Standard 3V or 5V CMOS control logic
independent of supply voltage
Very low power consumption
RoHS-compliant 24-lead 4x4 mm QFN
Figure 1. Functional Schematic Diagram
RF Input
Switched Attenuator Array
Figure 2. Package Type
4x4 mm 24-Lead QFN
RF Output
Parallel Control 6
Control Logic Interface
Table 1. Electrical Specifications @ +25°C, VDD = 3.0 V - 5.0 V
Parameter
Operation Frequency
Insertion Loss
Test Conditions
Attenuation Accuracy Any Bit or Bit Combination
1 dB Compression2
Frequency
DC - 2.2 GHz
2.2 - 4.0 GHz
DC 1.0 GHz
1.0 < 2.8 GHz
2.8 - 3.8 GHz
1 MHz - 2.2 GHz
2.2 - 4.0 GHz
Minimum
DC
-
-
Input IP31
Two-tone inputs +18 dBm
1 MHz - 2.2 GHz
-
Return Loss
DC - 2.2 GHz
2.2 - 4.0 GHz
Switching Speed
50% of control voltage to
90% of final attenuation level
Notes: 1. Device Linearity will begin to degrade below 1 Mhz
2. Note Absolute Maximum in Table 4.
-
Typical
1.6
2.2
-
32
30
52
20
15
-
Maximum
4000
±(0.10 + 3% of atten setting)
±(0.15 + 4% of atten setting)
±(0.20 + 5% of atten setting)
-
-
1
Units
MHz
dB
dB
dB
dB
dB
dBm
dBm
dBm
dB
dB
µs
Document No. 70-0218-01 www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 6




Peregrine Semiconductor

PE4309 Datasheet Preview

PE4309 Datasheet

RF Digital Attenuator

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www.DataSheet4U.com
Figure 3. Pin Configuration (Top View)
N/C 1
VDD 2
N/C 3
RF1 4
N/C 5
ACG 6
18 N/C
17 N/C
16 N/C
15 RF2
14 N/C
13 ACG
Exposed
Ground
Paddle
Table 2. Pin Descriptions
Pin No. Pin Name
Description
1
N/C3
No Connect
2 VDD Power supply pin
3
N/C3
No Connect
4 RF1 RF port
5
N/C3
No Connect
6
ACG4
AC Ground connection
7
ACG4
AC Ground connection
8
ACG4
AC Ground connection
9
ACG4
AC Ground connection
10
ACG4
AC Ground connection
11
ACG4
AC Ground connection
12
GND
Ground connection.
13
ACG4
AC Ground connection
14
N/C3
No Connect
15 RF2 RF port
16
N/C3
No Connect
17
N/C3
No Connect
18
N/C3
No Connect
19 C16 Attenuation control bit, 16 dB
20 C8 Attenuation control bit, 8 dB
21 C4 Attenuation control bit, 4 dB
22 C2 Attenuation control bit, 2 dB
23 C1 Attenuation control bit, 1 dB
24
C0.5
Attenuation control bit, 0.5 dB
Paddle
GND
Ground for proper operation
Notes: 3. For improved RF performance No Connect pins can be
connected to RF ground.
4. Pins can either be grounded directly or through coupling
capacitors
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the package
must be grounded for proper device operation.
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 6
PE4309
Advance Information
Table 3. Operating Ranges
Parameter
Min Typ
VDD Power Supply
Voltage
IDD Power Supply
Current
2.7 3.0
100
Max
5.5
150
Units
V
µA
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage
-0.3 6.0
V
VI
Voltage on any DC input
-0.3 6.0
V
TST
Storage temperature range -65 150
°C
TOP
Operating temperature
range
-40 85
°C
PIN Input power (50)
34 dBm
VESD
ESD voltage (Human Body
Model)
2000
V
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rate specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Control Voltage
State
Bias Condition
Low 0 to +1.0 Vdc at 2 µA (typ)
High
+2.0 to +5 Vdc at 10 µA (typ)
Table 6. Truth Table
C16 C8 C4 C2 C1 C0.5 Attenuation State
1 1 1 1 1 1 Reference Loss (IL)
111110
0.5 dB
111101
1 dB
111011
2 dB
110111
4 dB
101111
8 dB
011111
16 dB
000000
31.5 dB
Document No. 70-0218-01 UltraCMOS™ RFIC Solutions


Part Number PE4309
Description RF Digital Attenuator
Maker Peregrine Semiconductor
Total Page 6 Pages
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