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Peregrine Semiconductor

PE42551 Datasheet Preview

PE42551 Datasheet

SPDT RF Switch

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Product Description
The PE42551 RF Switch is designed to support the
requirements of the test equipment and ATE market. This
broadband general purpose switch maintains excellent RF
performance and linearity from 9 kHz through 6000 MHz. The
PE42551 integrates on-board CMOS control logic driven by a
single-pin, low voltage CMOS control input. It also has a logic
select pin which enables changing the logic definition of the
control pin. Additional features include a novel user defined
logic table, enabled by the on-board CMOS circuitry. The
PE42551 also exhibits outstanding isolation that approaches
21 dB at 6000 MHz and is offered in a small 4x4x0.85 mm
QFN package.
The PE42551 is manufactured on Peregrine’s UltraCMOS®
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance of
GaAs with the economy and integration of conventional CMOS.
Figure 1. Functional Diagram
Peregrine Specification 71-0065
Product Specification
PE42551
SPDT UltraCMOS® RF Switch
9 kHz - 6000 MHz
Features
HaRP™-Technology –Enhanced
Eliminates Gate and Phase Lag
No insertion loss nor phase drift
Fast settling time
High linearity 50 dBm IIP3
Low insertion loss: 0.65 dB at 3000 MHz,
0.90 dB at 6000 MHz
High isolation of 29 dB at 3000 MHz,
21 dB at 6000 MHz
High power 1 dB compression point
of +34 dBm
ESD: 500 V HBM
Single-pin 2.75V CMOS logic control
Logic select pin to change definition of
logic control
Reflective switch design
20-lead 4x4x0.85 mm QFN package
Figure 2. Package Type
20-lead 4x4x0.85 mm QFN
Table 1. Electrical Specifications @ +25°C, VDD = 2.75V (ZS = ZL = 50 )
Parameter
Conditions
Min
Operation Frequency
Insertion Loss
Isolation – RF1 to RF2
Return Loss
RF1, RF2 and RFC
Switching Time
Input 1 dB Compression
Input IP3
9 kHz
3000 MHz
6000 MHz
3000 MHz
6000 MHz
3000 MHz
6000 MHz
50% CTRL to 0.1 dB final value
6000 MHz
6000 MHz
9 kHz
28
14
32
Note: Device linearity will begin to degrade below 10 MHz.
Typical
0.55
0.65
0.90
29
21
18
14
7
34
+50
Max
6000
0.65
0.75
Units
MHz
dB
dB
dB
dB
dB
dB
dB
µs
dBm
dBm
Document No. 70-0350-02 www.psemi.com
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Page 1 of 9




Peregrine Semiconductor

PE42551 Datasheet Preview

PE42551 Datasheet

SPDT RF Switch

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Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Pin No.
13
Pin Name
Description
RF2 RF2 port.1
1, 2, 4, 5,
6, 7, 9, 10,
11, 12, 14,
15, 19
GND
Ground Connection. Traces should be
physically short and connected to the
ground plane. This pin is connected to
the exposed solder pad that also must
be soldered to the ground plane for best
performance.
3 RF1 RF1 port.1
16
CTRL
CMOS level (See Table 5)
8
RFC
Common RF port for switch1
Logic Select - Used to determine the
17 LS definition for the CTRL pin (see
Table 5)
18
VSS
Negative power supply. Apply nominal
-2.75V supply2
20
Paddle
VDD
GND
Nominal 2.75V supply connection
Exposed Ground Paddle
Notes:
1. All RF pins must be held at 0 VDC or the DC must be blocked with
an external series capacitor
2. Use VSS (pin 13, VSS = -VDD) to bypass and disable internal negative
voltage generator. Connect VSS (pin 13) to GND (VSS = 0V) to enable
internal negative voltage generator.
PE42551
Product Specification
Table 3. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage
-0.3 4.0
VI
Voltage on any input except
for CTRL and LS inputs
-0.3
VDD+
0.3
V
V
VCTRL Voltage on CTRL input
4.0 V
VLS Voltage on LS input
4.0 V
TST Storage temperature range
-65 150
°C
TOP Operating temperature range -40 85
°C
Input Power 50:
PIN 9 kHz 4 MHz
4 MHz 6 GHz
Fig. 4 dBm
31 dBm
VESD
ESD voltage HBM1
500 V
Note: 1. Human Body Model (HBM, MIL_STD 883 Method 3015.7)
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS® device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE42551 in the 20-lead 4x4x0.85 mm QFN
package is MSL1.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS®
devices are immune to latch-up.
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0350-02 UltraCMOS® RFIC Solutions
Page 2 of 9
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com


Part Number PE42551
Description SPDT RF Switch
Maker Peregrine Semiconductor
Total Page 9 Pages
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