MC8051
Key Features
- The toplevel signal names are shown as well as the three memory blocks used in the design. The user selectable number of serial interfaces and timer/counter units is indicated by the dotted line between the modules mc8051_siu and mc8051_tmrctr. clk reset all_t0_i all_t1_i all_rxd_i int0_i int1_i p0_i p1_i p2_i p3_i N N N mc8051_siu mc8051_siu N N N all_rxdwr_o all_txd_o all_rxd_o N N mc8051_alu N N mc8051_tmrctr mc8051_tmrctr 8 8 8 8 8 8 8 8 p0_o p1_o p2_o p3_o mc8051_control mc8051_core mc8051_top mc8051_ram (128x8 bit) mc8051_rom (up to 64kx8 bit) mc8051_ramx (up to 64kx8 bit) figure 1: Block diagram of the 8051 microcontroller IP-core. page 3 of 11 Signal Name clk reset all_t0_i all_t1_i all_rxd_i int0_i int1_i p0_i p1_i p2_i p3_i all_rxdwr_o all_txd_o all_rxd_o p0_o p1_o p2_o p3_o
