Fully synchronous design Instruction set compatible to the industry standard 8051 microcontroller Optimized architecture enables fast one to four clocks per OP code Up to.

System clock. Only rising edge used. Asynchronous reset of all flip-flops. Timer/counter 0 inputs. Timer/counter 1 inputs. Receive data input for serial interface units. Interrupt 0 inputs. Interrupt 1 inputs. Parallel port 0 input. Parallel port 1 i.

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