The LS161A and LS163A count modulo 16 (binary). The LS161A has an asynchronous Master Reset (Clear) input that override.

The LS161A/163A are 4-bit synchronous counters with a synchronous Parallel Enable (Load) feature. The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (.

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