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NB7V33M - 1.8V / 2.5V 10GHz Div By 4 Clock Divider

Description

asynchronous reset.

The differential Clock inputs incorporate internal 50 W termination resistors and will accept LVPECL, CML and LVDS logic levels.

The NB7V33M produces a ÷4 output copy of an input Clock operating up to 10 GHz with minimal jitter.

Features

  • Maximum Input Clock Frequency > 10 GHz, typical.
  • 260 ps Typical Propagation Delay.
  • 35 ps Typical Rise and Fall Times.
  • Differential CML Outputs, 400 mV Peak.
  • to.
  • Peak, Typical.
  • Operating Range: VCC = 1.71 V to 2.625 V with GND = 0 V.
  • Internal 50 W Input Termination Resistors.
  • Random Clock Jitter < 0.8 ps RMS.
  • QFN.
  • 16 Package, 3 mm x 3 mm.
  • 40ºC to +85°C Ambient Operating Temperature.

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Datasheet Details

Part number NB7V33M
Manufacturer onsemi
File Size 161.21 KB
Description 1.8V / 2.5V 10GHz Div By 4 Clock Divider
Datasheet download datasheet NB7V33M Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NB7V33M 1.8V / 2.5V, 10GHz ÷4 Clock Divider with CML Outputs Multi−Level Inputs w/ Internal Termination Description The NB7V33M is a differential B4 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50 W termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V33M produces a ÷4 output copy of an input Clock operating up to 10 GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon powerup, the internal flip*flops will attain a random state; the Reset allows for the synchronization of multiple NB7V33M’s in a system. The 16 mA differential CML output provides matching internal 50 W termination which guarantees 400 mV output swing when externally receiver terminated with 50 W to VCC.
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