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  ON Semiconductor Electronic Components Datasheet  

NB7V32M Datasheet

10 GHz/2 Clock Divider

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NB7V32M
1.8V / 2.5V, 10GHz ÷2 Clock
Divider with CML Outputs
MultiLevel Inputs w/ Internal
Termination
Description
The NB7V32M is a differential B2 Clock divider with
asynchronous reset. The differential Clock inputs incorporate internal
50 W termination resistors and will accept LVPECL, CML and LVDS
logic levels.
The NB7V32M produces a B2 output copy of an input Clock
operating up to 10 GHz with minimal jitter.
The RESET Pin is asserted on the rising edge. Upon powerup, the
internal flipflops will attain a random state; the Reset allows for the
synchronization of multiple NB7V32M’s in a system.
The 16 mA differential CML output provides matching internal
50 W termination which guarantees 400 mV output swing when
externally receiver terminated with 50 W to VCC .
The NB7V32M is the 1.8 V/2.5 V version of the NB7L32M
(2.5 V/3.3 V) and is offered in a low profile 3 mm x 3 mm 16pin
QFN package. The NB7V32M is a member of the GigaComm
family of high performance clock products. Application notes,
models, and support documentation are available at
www.onsemi.com.
Features
Maximum Input Clock Frequency > 10 GHz, typical
Random Clock Jitter < 0.8 ps RMS
200 ps Typical Propagation Delay
www.DataS3he5ept4sUT.cyopmical Rise and Fall Times
Differential CML Outputs, 400 mV PeaktoPeak, Typical
Operating Range: VCC = 1.71 V to 2.625 V with GND = 0 V
Internal 50 W Input Termination Resistors
QFN16 Package, 3 mm x 3 mm
40°C to +85°C Ambient Operating Temperature
These are PbFree Devices
http://onsemi.com
1
QFN16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB7V
32M
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
R
VTCLK
50W
CLK
CLK
50W
VTCLK
VREFAC
RESET
B2
Q
Q
Figure 1. Simplified Logic Diagram
© Semiconductor Components Industries, LLC, 2009
November, 2009 Rev. 4
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
1 Publication Order Number:
NB7V32M/D


  ON Semiconductor Electronic Components Datasheet  

NB7V32M Datasheet

10 GHz/2 Clock Divider

No Preview Available !

NB7V32M
VCC R VCC VCC Exposed Pad (EP)
16 15 14 13
VTCLK 1
CLK 2
CLK 3
VTCLK 4
NB7V32M
12 VCC
11 Q
10 Q
9 VCC
Table 1. TRUTH TABLE
CLK
CLK
R
xx
H
ZW
L
Z = LOW to HIGH Transition
W = HIGH to LOW Transition
x = Don’t Care
Q
L
CLK B 2
Q
H
CLK B 2
5678
VREFAC GND GND GND
Figure 2. Pin Configuration (Top View)
Table 2. PIN DESCRIPTION
Pin Name
I/O
Description
1 VTCLK
Internal 50 W Termination Pin for CLK
2 CLK LVPECL, CML, Noninverted Differential CLK Input. (Note 1)
LVDS Input
3 CLK LVPECL, CML, Inverted Differential CLK Input. (Note 1)
LVDS Input
4 VTCLK
Internal 50 W Termination Pin for CLK
5 VREFAC
Internally Generated Output Voltage Reference for CapacitorCoupled Inputs, only
6 GND
Negative Supply Voltage
7 GND
Negative Supply Voltage
8 GND
Negative Supply Voltage
9 VCC
Positive Supply Voltage. (Note 2)
10 Q
CML Output Inverted Differential Output
11 Q
CML Output NonInverted Differential Output
www.DataS1h2eet4U.VcoCmC
13 VCC
Positive Supply Voltage. (Note 2)
Positive Supply Voltage. (Note 2)
14 VCC
Positive Supply Voltage. (Note 2)
15 R LVCMOS Input Asynchronous Reset Input. Internal 75 kW pulldown to GND.
16 VCC
Positive Supply Voltage. (Note 2)
EP
The Exposed Pad (EP) on the QFN16 package bottom is thermally connected to the die for im-
proved heat transfer out of package. The exposed pad must be attached to a heatsinking con-
duit. The pad is electrically connected to the die, and must be electrically and thermally connected
to GND on the PC board.
1. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage or left open,
and if no signal is applied on CLK/CLK input, then the device will be susceptible to selfoscillation. Q/Q outputs have internal 50 W source
termination resistors.
2. VCC and GND pins must be externally connected to a power supply for proper operation.
http://onsemi.com
2


Part Number NB7V32M
Description 10 GHz/2 Clock Divider
Maker ON Semiconductor
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