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NB7L11M 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination
Description
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The NB7L11M is a differential 1−to−2 clock/data distribution chip with internal source termination and CML output structure, optimized for low skew and minimal jitter. The device is functionally equivalent to the EP11, LVEP11, or SG11 devices. Device produces two identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively. As such, NB7L11M is ideal for SONET, GigE, Fiber Channel, Backplane and other clock/data distribution applications. Inputs incorporate internal 50 W termination resistors and accept LVPECL, CML, LVCMOS, LVTTL, or LVDS (See Table 6).