MC10E196 PROGRAMMABLE DELAY CHIP
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PLCC−28 FN SUFFIX CASE 776
MARKING DIAGRAM*
1
MCxxxE196FNG AWLYYWW
xxx A WL YY WW G
= 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week.
The delay section consists of a chain of gates and a linear ramp delay adjust organized as shown in the logic symbol. T.
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