Dual D-Type Flip-Flop with Preset and Clear
■ High Speed: fMAX = 170MHz (typ.) at TA = 25°C
■ High noise immunity: VNIH = VNIL = 28% VCC (min.)
■ Power down protection is provided on all inputs
■ Low power dissipation: ICC = 2µA (max.) at TA = 25°C
■ Pin and function compatible with 74HC74
The VHC74 is an advanced high speed CMOS Dual
D-Type Flip-Flop fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The signal level applied to
the D input is transferred to the Q output during the posi-
tive going transition of the CK pulse. CLR and PR are
independent of the CK and are accomplished by setting
the appropriate input LOW.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Semiconductor Components Industries, LLC.
August-2017, Rev. 2
Publication Order Number: