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74VHC74 Datasheet

Dual D-Type Flip-Flop

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74VHC74
Dual D-Type Flip-Flop with Preset and Clear
Features
High Speed: fMAX = 170MHz (typ.) at TA = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min.)
Power down protection is provided on all inputs
Low power dissipation: ICC = 2µA (max.) at TA = 25°C
Pin and function compatible with 74HC74
General Description
The VHC74 is an advanced high speed CMOS Dual
D-Type Flip-Flop fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The signal level applied to
the D input is transferred to the Q output during the posi-
tive going transition of the CK pulse. CLR and PR are
independent of the CK and are accomplished by setting
the appropriate input LOW.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order Number
74VHC74M
74VHC74SJ
74VHC74MTC
74VHC74N
Package
Number
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Semiconductor Components Industries, LLC.
August-2017, Rev. 2
Publication Order Number:
74VHC74/D


  ON Semiconductor Electronic Components Datasheet  

74VHC74 Datasheet

Dual D-Type Flip-Flop

No Preview Available !

Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
D1, D2
CK1, CK2
CLR1, CLR2
PR1, PR2
Q1, Q1, Q2, Q2
Description
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Preset Inputs
Output
Truth Table
Inputs
Outputs
CLR PR D CK Q
Q Function
L HXX L
H Clear
H LXX H
L Preset
L L X X H(1) H(1)
H HL
LH
H HH
HL
H HX
Qn Qn No Change
Note:
1. This configuration is nonstable; that is, it will not persist
when preset and clear inputs return to their inactive
(HIGH) state.
www.onsemi.com
2


Part Number 74VHC74
Description Dual D-Type Flip-Flop
Maker ON Semiconductor
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74VHC74 Datasheet PDF






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