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P2003EVG Datasheet Preview

P2003EVG Datasheet

P-Channel Logic Level Enhancement Mode Field Effect Transistor

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NIKO-SEM
P-Channel Logic Level Enhancement
Mode Field Effect Transistor
P2003EVG
SOP-8
Lead-Free
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
-30 20m
ID
-9A
D
G
4 :GATE
5,6,7,8 :DRAIN
1,2,3 :SOURCE
S
www.DataShAeBetS4UO.cLoUmTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
TC = 25 °C
TC = 70 °C
Power Dissipation
TC = 25 °C
TC = 70 °C
Operating Junction & Storage Temperature Range
VDS
VGS
ID
IDM
PD
Tj, Tstg
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
LIMITS
-30
±20
-9
-8
-50
2.5
1.3
-55 to 150
MAXIMUM
UNITS
V
V
A
W
°C
UNITS
Junction-to-Case
RθJc
25 °C / W
Junction-to-Ambient
RθJA
1Pulse width limited by maximum junction temperature.
2Duty cycle 1%
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
50 °C / W
LIMITS
UNIT
MIN TYP MAX
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current1
Drain-Source On-State
Resistance1
Forward Transconductance1
V(BR)DSS
VGS(th)
IGSS
IDSS
ID(ON)
RDS(ON)
gfs
VGS = 0V, ID = -250µA
VDS = VGS, ID = -250µA
-30
-1 -1.5
-3
V
VDS = 0V, VGS = ±20V
±100 nA
VDS = -24V, VGS = 0V
VDS = -20V, VGS = 0V, TJ = 125 °C
-1
µA
-10
VDS = -5V, VGS = -10V
VGS = -4.5V, ID = -7A
VGS = -10V, ID = -9A
VDS = -10V, ID = -9A
-50
25
15
24
A
35
m
20
S
OCT-20-2004
1




Niko

P2003EVG Datasheet Preview

P2003EVG Datasheet

P-Channel Logic Level Enhancement Mode Field Effect Transistor

No Preview Available !

NIKO-SEM
P-Channel Logic Level Enhancement
Mode Field Effect Transistor
P2003EVG
SOP-8
Lead-Free
DYNAMIC
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge2
Gate-Source Charge2
www.DataSheGeta4tUe.-cDomrain Charge2
Turn-On Delay Time2
Rise Time2
Turn-Off Delay Time2
Fall Time2
Ciss
Coss
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VGS = 0V, VDS = -15V, f = 1MHz
VDS = 0.5V(BR)DSS, VGS = -10V,
ID = -9A
VDS = -15V, RL = 1
ID -1A, VGS = -10V, RGS = 6
1610
410
200
17 24
5
6
5.7
10
18
5
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
IS
Pulsed Current3
ISM
Forward Voltage1
VSD
1Pulse test : Pulse Width 300 µsec, Duty Cycle 2 .
2Independent of operating temperature.
3Pulse width limited by maximum junction temperature.
IF = -1A, VGS = 0V
-2.1
-4
-1.2
pF
nC
nS
A
V
REMARK: THE PRODUCT MARKED WITH “P2003EVG”, DATE CODE or LOT #
Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.
OCT-20-2004
2


Part Number P2003EVG
Description P-Channel Logic Level Enhancement Mode Field Effect Transistor
Maker Niko
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P2003EVG Datasheet PDF






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