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P9006EDG - P-Channel Logic Level Enhancement

Download the P9006EDG datasheet PDF. This datasheet also covers the P9006EDG_Niko variant, as both devices belong to the same p-channel logic level enhancement family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (P9006EDG_Niko-Sem.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number P9006EDG
Manufacturer NIKO-SEM
File Size 308.74 KB
Description P-Channel Logic Level Enhancement
Datasheet download datasheet P9006EDG Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
NIKO-SEM P-Channel Logic Level Enhancement Mode Field Effect Transistor (Preliminary) P9006EDG TO-252 Lead-Free D PRODUCT SUMMARY V(BR)DSS -60V RDS(ON) 90m ID -8A G S 1. GATE 2. DRAIN 3. SOURCE ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Power Dissipation 1 SYMBOL VDS VGS LIMITS -60 ±20 -7 -6 -30 28 18 -55 to 150 275 UNITS V V TC = 25 °C TC = 70 °C ID IDM A TC = 25 °C TC = 70 °C PD Tj, Tstg TL W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.
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