BYDMX3P-30SP Overview
Description Chip Reset input. This pin is an active low RESET to the device. VCC GND XTAL1 XTAL2 DTIME DUTY DMX/ STA PWM1 PWM2 PWM3 Positive supply for logic and I/ O pins(5VDC).
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | BYDMX3P-30SP |
|---|---|
| Datasheet | BYDMX3P-30SP BYDMX3P-30-Net Datasheet (PDF) |
| File Size | 320.91 KB |
| Manufacturer | Net-Control |
| Description | DMX512 Receiver Chip |
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Description Chip Reset input. This pin is an active low RESET to the device. VCC GND XTAL1 XTAL2 DTIME DUTY DMX/ STA PWM1 PWM2 PWM3 Positive supply for logic and I/ O pins(5VDC).
See all Net-Control datasheets
| Part Number | Description |
|---|---|
| BYDMX3P-30 | DMX512 Receiver Chip |
| BYDMX3P-31 | DMX512 Receiver Chip |
| BYDMX3P-31TQFP | DMX512 Receiver Chip |