This high speed shift register utilizes advanced silicon-gate CMOS technology This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits as well as the ability to drive 15 LS-TTL loads
This device contains an 8-bit serial-in parallel-out shift regist
Features
Y Low quiescent current 80 mA maximum (74HC Series) Y Low input current 1 mA maximum Y 8-bit serial-in parallel-out shift register
with storage Y Wide operating voltage range 2V.
6V Y Cascadable Y Shift register has direct clear Y Guaranteed shift frequency DC to 30 MHz
Truth Table
Dual-In-Line Package
RCK SCK SCLR G
Function
X
X
X
X
Xu
uX
X
H QA thru QHeTRI STATE
L
L Shift Register cleared
Q He
H
L Shift Register clocked
QNeQn Q eSER
H
L Contents of Shift
Register t.
The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
MM54HC595 MM74HC595 8-Bit Shift Registers with Output Latches
January 1988
MM54HC595 MM74HC595 8-Bit Shift Registers with Output Latches
General Description
This high speed shift register utilizes advanced silicon-gate CMOS technology This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits as well as the ability to drive 15 LS-TTL loads
This device contains an 8-bit serial-in parallel-out shift register that feeds an 8-bit D-type storage register The storage register has 8 TRI-STATE outputs Separate clocks are provided for both the shift register and the storage register The shift register has a direct-overriding clear serial input and serial output (standard) pins for cascading Both the shift register and storage register use positiv
MM74HC595 Datasheet
