Absolute Maximum Ratings (Notes 1 2)
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please contact the National Semiconductor Sales
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Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (ICD)
DC Output Current per pin (IOUT)
DC VCC or GND Current per pin (ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S O Package only
b0 5 to a7 0V
b1 5 to VCCa1 5V
b0 5 to VCCa0 5V
g20 mA
g25 mA
g50 mA
b65 C to a150 C
600 mW
500 mW
Lead Temperature (TL)
(Soldering 10 seconds)
260 C
Operating Conditions
Supply Voltage (VCC)
DC Input or Output Voltage
(VIN VOUT)
Operating Temp Range (TA)
MM74HC
MM54HC
Min
2
0
b40
b55
Input Rise or Fall Times
(tr tf)
VCCe2 0V
VCCe4 5V
VCCe6 0V
Max
6
VCC
a85
a125
1000
500
400
Units
V
V
C
C
ns
ns
ns
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VCC TAe25 C
Typ
74HC
54HC
TAeb40 to 85 C TAeb55 to 125 C
Guaranteed Limits
Units
VIH Minimum High Level Input
Voltage
2 0V
15
15
4 5V
3 15
3 15
6 0V
42
42
15
3 15
42
V
V
V
VIL Maximum Low Level Input
Voltage
2 0V
05
05
4 5V
1 35
1 35
6 0V
18
18
05
1 35
18
V
V
V
VOH Minimum High Level Output VINeVIH or VIL
Voltage
lIOUTls20 mA
2 0V 2 0 1 9
4 5V 4 5 4 4
6 0V 6 0 5 9
19
44
59
19 V
44 V
59 V
VINeVIH or VIL
lIOUTls4 0 mA
lIOUTls5 2 mA
4 5V 4 2 3 98
6 0V 5 7 5 48
VOL Maximum Low Level Output VINeVIH or VIL
Voltage
lIOUTls20 mA
2 0V 0 0 1
4 5V 0 0 1
6 0V 0 0 1
3 84
5 34
01
01
01
37 V
52 V
01 V
01 V
01 V
VINeVIH or VIL
lIOUTls4 0 mA
lIOUTls5 2 mA
4 5V 0 2
6 0V 0 2
26
26
0 33
0 33
04 V
04 V
IIN
Maximum Input Current
VINeVCC or GND 6 0V
g0 1
g1 0
g1 0
mA
ICC Maximum Quiescent Supply VINeVCC or GND 6 0V
Current
IOUTe0 mA
80
80
160 mA
Note 1 Maximum Ratings are those values beyond which damage to the device may occur
Note 2 Unless otherwise specified all voltages are referenced to ground
Note 3 Power Dissipation temperature derating plastic ‘‘N’’ package b12 mW C from 65 C to 85 C ceramic ‘‘J’’ package b12 mW C from 100 C to 125 C
Note 4 For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for HC at 4 5V Thus the 4 5V values should be used when
designing with this supply Worst case VIH and VIL occur at VCCe5 5V and 4 5V respectively (The VIH value at 5 5V is 3 85V ) The worst case leakage current (IIN
ICC and IOZ) occur for CMOS at the higher voltage and so the 6 0V values should be used
VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89
2
