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DS8640 - Quad NOR Unified Bus Receiver

This page provides the datasheet information for the DS8640, a member of the DS8640N Quad NOR Unified Bus Receiver family.

Datasheet Summary

Description

The DS7640 and DS8640 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to the a5V logic supply together with a 390X resistor from the bus to g

Features

  • Y Low input current with normal VCC or VCC e 0V (30 mA typ) Y High noise immunity (1 1V typ) Y Temperature-insensitive input thresholds track bus logic levels Y TTL compatible output Y Matched optimized noise immunity for ‘‘1’’ and ‘‘0’’ levels Y High speed (19 ns typ) Connection Diagram Dual-In-Line Package Typical.

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Datasheet preview – DS8640

Datasheet Details

Part number DS8640
Manufacturer National Semiconductor
File Size 103.65 KB
Description Quad NOR Unified Bus Receiver
Datasheet download datasheet DS8640 Datasheet
Additional preview pages of the DS8640 datasheet.

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Full PDF Text Transcription

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DS7640 DS8640 Quad NOR Unified Bus Receiver February 1996 DS7640 DS8640 Quad NOR Unified Bus Receiver General Description The DS7640 and DS8640 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to the a5V logic supply together with a 390X resistor from the bus to ground The design employs a built-in input threshold providing substantial noise immunity Low input current allows up to 27 driver receiver pairs to utilize a common bus Features Y Low input current with normal VCC or VCC e 0V (30 mA typ) Y High noise immunity (1 1V typ) Y Temperature-insensitive input thresholds track bus logic levels Y TTL compatible output Y Matched opt
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