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DS26C32AT - Quad Differential Line Receiver

Description

The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.

Features

  • internal pull-up and pull-down resistors which prevent output oscillation on unused channels. The DS26C32A provides an enable and disable function common to all four receivers, and features TRI-STATE ® outputs with 6 mA source and sink capability. This product is pin compatible with the DS26LS32A and the AM26LS32. Features n CMOS design for low power n ± 0.2V sensitivity over input common mode voltage range n Typical propagation delays: 19 ns n Typical input hysteresis: 60 mV n Inputs won’t loa.

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Other Datasheets by National Semiconductor (Texas Instruments)

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS26C32AT/DS26C32AM Quad Differential Line Receiver June 1998 DS26C32AT/DS26C32AM Quad Differential Line Receiver General Description The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS. The DS26C32A has an input sensitivity of 200 mV over the common mode input voltage range of ± 7V. The DS26C32A features internal pull-up and pull-down resistors which prevent output oscillation on unused channels. The DS26C32A provides an enable and disable function common to all four receivers, and features TRI-STATE ® outputs with 6 mA source and sink capability.
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