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DP8404 - Error Detection and Correction Circuits

Download the DP8404 datasheet PDF. This datasheet also covers the DP8402A variant, as both devices belong to the same error detection and correction circuits family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (DP8402A-NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

The DP8402A DP8403 DP8404 and DP8405 devices are 32-bit parallel error detection and correction circuits (EDACs) in 52-pin DP8402A and DP8403 or 48-pin DP8404 and DP8405 600-mil packages The EDACs use a modified Hamming code to generate a 7-bit check word from a 32-bit data word This check word is stored along with the data word during the memory write cycle During the memory read cycle the 39-bit words from memory are processed by the EDACs to determine if errors have occurred in memory Single-bit errors in the 32-bit data word are flagged and corrected Single-bit errors in the 7-bit check word are flagged and the CPU sends the EDAC through the correction cycle even though the 32-bit data word is not in error The correction cycle will simply pass along the original 32-bit data word in this case and produce error syndrome bits to pinpoint the error-generating location Double bit errors are flagged but not corrected These errors may occur in any two bits of the 39-bit word from memory (two errors in the 32-bit data word two errors in the 7-bit check word or one error in each word) The gross-error condition of all lows or all highs from memory will be detected Otherwise errors in three or more bits of the 39-bit word are beyond the capabilities of these devices to detect Read-modify-write (byte-control) operations can be performed with the DP8402A and DP8403 EDACs by using output latch enable LEDBO and the individual OEB0 thru OEB3 byte control pins Diagnostics are performed on the EDACs by controls and internal paths that allow the user to read the contents of the DB and CB input latches These will determine if the failure occurred in memory or in the EDAC

Overview

DP8402A DP8403 DP8404 DP8405 32-Bit Parallel Error Detection and Correction Circuits (EDAC’s) Obsolete PRELIMINARY August 1989 DP8402A DP8403 DP8404 DP8405 32-Bit Parallel Error Detection and Correction Circuits.

Key Features

  • Y Detects and corrects single-bit errors Y Detects and flags double-bit errors Y Built-in diagnostic capability Y Fast write and read cycle processing times Y Byte-write capability DP8402A and DP8403 Y Fully pin and function compatible with TI’s SN74ALS632A thru SN74ALS635 series System Environment TL F 8535.
  • 1 TRI-STATE is a registered trademark of National Semiconductor Corp C1995 National Semiconductor Corporation TL F 8535 RRD-B30M105 Printed in U S A Simplified Functional Bloc.