DM7442A Datasheet, National Semiconductor

Y Diode clamped inputs Y Also for application as 4-line-to-16-line decoders 3-line- to-8-line decoders Y All outputs are high for invalid input conditions Y Typical power.

These BCD-to-decimal decoders consist of eight inverters and ten four-input NAND gates The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates Full decoding of input logic ensures that all outputs remain o.