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CLC-CAPT-PCASM Datasheet

Data Capture Board Users Guide

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N
CLC-CAPT-PCASM
Data Capture Board User’s Guide
October 2000
Section I. Introduction
The CLC3790093 Data Capture Board enables simple evaluation
of National Semiconductor’s High Speed Analog to Digital Con-
verters (ADCs) and the Diversity Receiver Chip Set (DRCS). The
Data Capture Board interfaces the outputs of these devices to the
standard serial port available on the back of most Personal
Computers (PCs). We have provided PC software to control the
data capture function and Matlab® scripts for data analysis.
Table of Contents
I. Introduction
II. Capturing Data from ADC
Evaluation Boards
III. Capturing Data from the DRCS
Evaluation Boards
IV. Data Analysis using Matlab
Script Files
A block diagram of the evaluation test bed is shown below.
The Data Capture Board contains a field-programmable gate
array (FPGA) that controls its operation. An EPROM configures
the FPGA after power is applied. The serial interface is provided
by a UART (Universal Asynchronous Receiver/Transmitter), an
oscillator, and a level translator IC. The captured data is stored in
either three 32K x 8 static RAMs (organized into 24-bit words) or
in a FIFO containing 32K 18-bit words. LEDs provide a visual
indication of activity. DIP switches and a jumper configure several
capture functions.
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Section II. Capturing Data from ADC
Evaluation Boards
Getting Started
To use the Data Capture board to capture data from a National
Semiconductor Analog to Digital converter, you will need the
following hardware, software, and documentation.
DataShee
National Semiconductor
High-Speed Converter
Evaluation Test Bed
CLCXXXX
A/D Converter
Evaluation Board
Digital Receiver
Evaluation Board
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© 2000 National Semiconductor Corporation
Printed in the U.S.A.
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Data
Capture
Board
http://www.national.com


National Semiconductor Electronic Components Datasheet

CLC-CAPT-PCASM Datasheet

Data Capture Board Users Guide

No Preview Available !

www.DataSheet4U.com
BPF (Mineola, NY) passive lters are used for most of
FILTERED
SIGNAL
SOURCE
our converter testing.
8. Clock Source. If you wish to test the ADC with a xed
OPTIONAL
CLOCK SOURCE
clock frequency, you may install a standard TTL
oscillator in the socket provided on the evaluation
+5V
VCC
(2A)
VCC
GND Data
Capture
Board
Serial I/O
Clock
Data
CLK
Optional
TTL
Oscillator
Power
ADC
Evaluation
Board
10-16dBm
board. Otherwise, you will need to provide a low
phase noise sinewave or square wave clock source
at the appropriate SMA connector on the evaluation
board. An amplitude of 10 to 16dBm is recommended.
Here, again, the HP 8644B is a good choice.
64P I/O
CONNECTOR
Software
To PC Serial
COMM PORT #1 or #2
1. National Semiconductor Software. All of the
required software is provided on a CD-ROM. To
Hardware
install the software now, insert the CD-ROM into
1. CLC3790093 Data Capture Board
your computer and follow the directions. The default
(CLC-CAPT-PCASM)
installation copies all of the les to a directory called
2. CLCXXXX Evaluation Board. Several ADC products
c:\nsc. The data capture software is called
can be evaluated with this system. Each product
capture.exe.
has a unique evaluation board which plugs into the
data capture board. In order to determine the
compatibility of specic ADC evaluation boards to the
data capture board, please refer to the Basestation
A/D Converter Evaluation Board Interoperability Guide
available on our website at http://www.national.com/
appinfo/wbp.
2. Matlab. A copy of Matlab version 5.1 or later is
required to operate the analysis routines. If you
simply wish to capture data to a le on your
PC and process the data with your own analysis
software, then you will not need Matlab. For more
information about Matlab, please see their website
at http://www.mathworks.com.
3. Personal Computer. An IBM-Compatible PC running
3. Matlab script les. The Matlab script les for data
et4U.com
Windows® 95, Windows® 98, or Windows® NT. The
PC should have an available serial port capable of
analysis are located in the c:\nsc\mlesdirectory.
These script les are run from the Matlab command
operating at
labeled and
115,200
referred
baud.
to as
These
COM1
ports
and
CaOreMu2s.DuTaahtllaeySheet4U.pcorommpt.
captured data is stored in a le on the PC to allow Documentation
custom analysis.
Applicable product data sheets and user guides can be found
4. Serial Cable. A standard serial interface cable is on the provided CD-ROM, with the most current versions
provided. This cable connects the data capture available on our website at:
board to the PC.
http://www.national.com/appinfo/wbp
5. Power Supply. The data capture board requires a
single +5V supply. This power is applied at
connector J3. A 2-amp supply will provide enough
current for the evaluation board and the data
capture board. Note that the power for the
evaluation board is provided from the data capture
board through the 64-pin connector J1.
6. Input signal. You can provide any type of input
signal that you feel is appropriate to your system
testing. The data analysis software provided with the
data capture board is oriented toward analysis of
single tone sinewave inputs. Our recommendation
for high purity, low phase noise reference signal
sources is the Hewlett Packard HP8644B
synthesizer. It provides an excellent input stimulus
for evaluating ADC performance.
7. Bandpass or lowpass lter. Even with a good
sinewave source, you will need to lter out the
harmonics of the signal source. A bandpass lter
also enables ltering of the wideband noise of the
reference source. As an example, Allen Avionics
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If you are evaluating the Diversity Receiver Chip Set,
please refer to Section III of this manual.
Operation of Data Capture Board
When evaluating the performance of an ADC, the data
capture board has two main modes of operation. In the
rst mode, data is captured from the evaluation board
under test at the full sample rate of the ADC. A
contiguous set of 32k data samples is captured into a
FIFO memory on the board, and then this data is moved
over to the PC at a slower rate. The data set is stored in a
le on the hard drive for later analysis. The data is stored
in an ASCII le in exactly the format that it is output from
the converter. For the CLC5957, the twos complement
12-Bit data is stored as numbers ranging from 0 to 4095.
In the case of the 14-bit CLC5958, the twos complement
data ranges from 0 to 16383. Each value is terminated
with a carriage return, hexadecimal 0D. Note that the
twos complement number can be converted to offset
binary by inverting the MSB. This is the rst step in the
Matlab routine for FFT analysis.
DataShee
http://www.national.com
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2


Part Number CLC-CAPT-PCASM
Description Data Capture Board Users Guide
Maker National Semiconductor
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