CLC012- Adaptive Cable Equalizer for ITU-T G.703 Data Recovery
CLC014- Adaptive Cable Equalizer for High-Speed Data Recovery
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www.DataSheet4U.com
October 2000
CLC-CAPT-PCASM Data Capture Board User’s Guide
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CLC-CAPT-PCASM Data Capture Board User’s Guide
Section I. Introduction
The CLC3790093 Data Capture Board enables simple evaluation of National Semiconductor’s High Speed Analog to Digital Converters (ADCs) and the Diversity Receiver Chip Set (DRCS). The Data Capture Board interfaces the outputs of these devices to the standard serial port available on the back of most Personal Computers (PCs). We have provided PC software to control the data capture function and Matlab® scripts for data analysis. A block diagram of the evaluation test bed is shown below. The Data Capture Board contains a field-programmable gate array (FPGA) that controls its operation. An EPROM configures the FPGA after power is applied.
CLC-CAPT-PCASM Datasheet
