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CD4035BM - 4-Bit Parallel-In/Parallel-Out Shift Register

Description

The CD4035B 4-bit parallel-in parallel-out shift register is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement mode transistors This shift register is a 4-stage clocked serial register having provisions for synchronous parallel inputs to each stag

Features

  • Y Y Y Y Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS 4-stage clocked operation Synchronous parallel entry on all 4 stages JK inputs on first stage Asynchronous true complement control on all outputs Reset control Static flip-flop operation master slave configuration Buffered outputs Low power dissipation 5 mW (typ ) (ceramic) High speed to 5 MHz.

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Part Number Description Manufacturer
CD4035BM CMOS 4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER Texas Instruments
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CD4035B CMOS 4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER Texas Instruments
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Other Datasheets by National Semiconductor (Texas Instruments)

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Full PDF Text Transcription

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CD4035BM CD4035BC 4-Bit Parallel-In Parallel-Out Shift Register February 1988 CD4035BM CD4035BC 4-Bit Parallel-In Parallel-Out Shift Register General Description The CD4035B 4-bit parallel-in parallel-out shift register is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement mode transistors This shift register is a 4-stage clocked serial register having provisions for synchronous parallel inputs to each stage and serial inputs to the first stage via JK logic Register stages 2 3 and 4 are coupled in a serial ‘‘D’’ flipflop configuration when the register is in the serial mode (parallel serial control low) Parallel entry via the ‘‘D’’ line of each register stage is permitted only when the parallel serial control is ‘‘high’’ In the parallel
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