CD4007M - Dual Complementary Pair Plus Inverter

National Semiconductor

CD4007M Datasheet Preview — Preview of CD4007M PDF

Datasheet Details

Part number	CD4007M
Manufacturer	National Semiconductor ↗
File Size	100.61 KB
Description	Dual Complementary Pair Plus Inverter
Datasheet	CD4007M_NationalSemiconductor.pdf

CD4007M Product details

Description

The CD4007M CD4007C consists of three complementary pairs of N- and P-channel enhancement mode MOS transistors suitable for series shunt applications All inputs are protected from static discharge by diode clamps to VDD and VSS For proper operation the voltages at all pins must be constrained to be between VSS b 0 3V and VDD a 0 3V at all times

Features

Y Y Wide supply voltage range High noise immunity 3 0V to 15V 0 45 VCC (typ ) Connection Diagram Dual-In-Line Package TL F 5943.
1 Top View Note All P-channel substrates are connected to VDD and all N-channel substrates are connected to VSS Order Number CD4007 C1995 National Semiconductor Corporation TL F 5943 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Offic.

📁 CD4007M Similar Datasheet

CD4007A - CMOS Dual Complementary Pair Plus Inverter (RCA)
CD4007AN - CMOS Dual Complementary Pair Plus Inverter (Texas Instruments)
CD4007CM - Dual Complementary Pair Plus Inverter (Fairchild Semiconductor)
CD4007CN - Dual Complementary Pair Plus Inverter (Fairchild Semiconductor)
CD4007UB - CMOS Dual Complementary Pair Plus Inverter (RCA)
CD4007UBE - CMOS Dual Complementary Pair Plus Inverter (Texas Instruments)
CD4007UBMS - CMOS Dual Complementary Pair Plus Inverter (Intersil Corporation)
CD4000 - Codoor Installation & User Manual (Siemens)

Other Datasheets by National Semiconductor

CD4007 - Dual Complementary Pair Plus Inverter
CD4007C - Dual Complementary Pair Plus Inverter
CD4001BC - NOR Buffered B Series Gate
CD4001BM - NOR Buffered B Series Gate
CD4002C - Dual 4-Input NOR(NAND) Gate
CD4002M - Dual 4-Input NOR(NAND) Gate

Published: Mar 23, 2005 |