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74F109 Datasheet, National Semiconductor

74F109 flip-flop equivalent, dual jk positive edge-triggered flip-flop.

74F109 Avg. rating / M : 1.0 rating-11

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74F109 Datasheet

Features and benefits

n Guaranteed 4000V minimum ESD protection. Ordering Code: See Section 0 Commercial Military 74F109PC 74F109SC (Note 1) 54F109DM (Note 2) 74F109SJ (Note 1) 54F109FM.

Description

The ’F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’F74 data she.

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TAGS

74F109
Dual
Positive
Edge-Triggered
Flip-Flop
74F10
74F1056
74F1071
National Semiconductor

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