54LS256 latch equivalent, dual 4-bit addressable latch.
Y Serial-to-parallel capability Y Output from each storage bit available Y Random (addressable) data entry Y Easily expandable Y Active low common clear
Connection Diagr.
The ’LS256 is a dual 4-bit addressable latch with common control inputs these include two Address inputs (A0 A1) an active LOW enable input (E) and an active LOW Clear input (CL) Each latch has a Data input (D) and four outputs (Q0
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