54F175 flip-flop equivalent, quad d flip-flop.
Y Edge-triggered D-type inputs Y Buffered positive edge-triggered clock Y Asynchronous common reset Y True and complement output Y Guaranteed 4000V minimum ESD protection.
where a common Master Reset and Clock are acceptable
Truth Table
Inputs
MR CP Dn
L XX H LH H LL
H e HIGH Voltage Level .
The ’F175 is a high-speed quad D flip-flop The device is useful for general flip-flop requirements where clock and clear inputs are common The information on the D inputs is stored during the LOW-to-HIGH clock transition Both true and complemented ou.
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