NT5DS64M8BG
Description
NT5DS128M4BF, NT5DS128M4BT, NT5DS64M8BF, NT5DS64M8BT, NT5DS32M16BF and NT5DS32M16BT are die B of 512Mb SDRAM devices based using DDR interface. They are all based on Nanya’s 110 nm design process.
Key Features
- DDR 512M bit, die B, based on 110nm design rules
- Double data rate architecture: two data transfers per clock cycle
- Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver
