NT5DS32M16DS
Feature
CAS Latency Frequency
DDR-333 DDR400 -5T/-5TI DDR500 z 2KB page size for all configurations.
Units
Speed Sorts
-6K/-6KI CL-t RCD-t RP -4T z DQS is edge-aligned with data for reads and is center-aligned with data for WRITEs
2.5-3-3 266 333 333
3-3-3 266 333 400
3-4-4 333 500 t CK
CL=2 Speed CL=2.5 CL=3 z Differential clock inputs (CK and CK)
Mbps z Data mask (DM) for write data z DLL aligns DQ and DQS transition with CK transitions. z mands entered on each positive CK edge; data z
Power Supply Voltage: VDD=VDDQ=2.5V 0.2V (DDR-333) VDD=VDDQ=2.6V 0.1V (DDR-400/500) and data mask referenced to both edges of DQS z Burst Lengths: 2, 4 or 8 z Auto Precharge option for each burst access z Auto-Refresh and Self-Refresh Mode z 7.8 µs max. Average Periodic Refresh Interval z 2.5V (SSTL_2 patible) I/O z Ro HS pliance z JEDEC Standard pliance z Packages: 66 pin TSOPII z z z z
4 internal memory banks for concurrent operation. CAS Latency: 2, 2.5 and 3 Double Data Rate...
