NT5CB128M16FP Industrial and Automotive DDR3(L) 2Gb SDRAM
• JEDEC DDR3 Compliant
- 8n Prefetch Architecture - Differential Clock(CK/) and Data Strobe(DQS/) - Double-data rate on DQs, DQS and DM
• Signal Integrity
-.
The chip is designed to comply with all key DDR3(L) DRAM key features and all of the control and address inputs are syn.
Image gallery
Download