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INTEGRATED CIRCUITS
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SSTVN16859 13-bit 1:2 SSTL_2 registered buffer for DDR
Product data sheet 2004 Jul 15
Philips Semiconductors
Philips Semiconductors
Product data sheet
13-bit 1:2 SSTL_2 registered buffer for DDR
www.DataSheet4U.com
SSTVN16859
FEATURES
• Stub-series terminated logic for 2.5 V VDD (SSTL_2) • Designed for PC1600–PC2700 (at 2.5 V) and PC3200 (at 2.6 V)
applications
such as DDR (Double Data Rate) SDRAM and SDRAM II Memory Modules. Different from traditional SDRAM, DDR SDRAM transfers data on both clock edges (rising and falling), thus doubling the peak bus bandwidth. A DDR DRAM rated at 133 MHz will have a burst rate of 266 MHz. The device data inputs consist of different receivers.