PSMN011-30YL Datasheet | NXP Semiconductors

LF PA K N-channel 10.7 mΩ 30 V Trench MOS logic level FET in LFPAK Rev. 2 - 17 May 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. This product is designed and qualified for use in industrial and munications applications. 1.2 Features and benefits - High efficiency due to low switching and conduction losses - Suitable for logic level gate drive sources 1.3 Applications - Class-D amplifiers - DC-to-DC converters - Motor control - Server power supplies 1.4 Quick reference data Table 1. Symbol VDS ID Ptot RDSon Quick reference data Parameter drain-source voltage drain current total power dissipation drain-source on-state resistance gate-drain charge Conditions Tj ≥ 25 °C; Tj ≤ 175 °C Tmb = 25 °C; VGS = 10 V; see Figure 1 Tmb = 25 °C; see Figure 2 VGS = 10 V; ID = 15 A; Tj = 25 °C VGS = 10 V; ID = 45 A; VDS = 15 V; see Figure 14; see Figure 15 VGS = 4.5 V; ID = 45 A; VDS = 15 V; see Figure 14; see Figure 15 Min Typ 9 Max Unit 30 51 49 V A W Static characteristics 10.7 mΩ Dynamic characteristics QGD 3.5 n C QG(tot) total gate charge - 7.3 - n C Avalanche ruggedness EDS(AL)S non-repetitive drain-source VGS = 10 V; Tj(init) = 25 °C; avalanche energy ID = 51 A; Vsup ≤ 30 V; RGS = 50 Ω; unclamped 14 m J NXP Semiconductors N-channel 10.7 mΩ 30 V Trench MOS logic level FET in LFPAK 2. Pinning information Table 2. Pin 1 2 3 4 mb Pinning information Symbol Description S S S G D source source source gate mounting base; connected to drain 1 2 3 4 mb Simplified outline Graphic...