P89LPC983 Datasheet | NXP Semiconductors

description The P89LPC980/982/983/985 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC980/982/983/985 in order to reduce ponent count, board space, and system cost. 2. Features and benefits 2.1 Principal features - 4 k B/8 k B byte-erasable flash code memory organized into 1 k B sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. - 256-byte RAM data memory. Both the P89LPC982 and the P89LPC985 also include a 256-byte auxiliary on-chip RAM. - 8-input multiplexed 10-bit ADC (P89LPC985, 4-input multiplexed 10-bit ADC on P89LPC983) with window parator that can generate an interrupt for in or out of range results. Two analog parators with selectable inputs and reference source. - Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to bee a PWM output). - A 23-bit system timer that can also be used as a real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer. - Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 k Hz byte-wide I2C-bus munication port and SPI munication port. - High-accuracy internal RC oscillator option 7.373 MHz calibrated to ±1 %, with clock doubler option, allows operation without external oscillator ponents. The RC oscillator option is selectable and fine tunable. - Watchdog timer with separate on-chip oscillator, nominal 400 k Hz/25 k Hz, calibrated to ±10 % at 400 k Hz, requiring no external ponents. The watchdog prescaler is selectable from eight values. - Pin remap for UART, I2C-bus and SPI. - 2.4 V to 5.5 V VDD operating range. - Enhanced low voltage (brownout) detect allows a graceful system shutdown when power...